Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 38307341 authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Paul Mackerras
Browse files

[PATCH] spufs: clear dsisr on CLASS1[Mf] exception 



Because of always clearing DSISR at spu class 1 interrupt handler,
kernel may lose Class1[Mf] interrupt.

Signed-off-by: default avatarMasato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: default avatarGeoff Levand <geoff.levand@am.sony.com>
Signed-off-by: default avatarArnd Bergmann <arndb@de.ibm.com>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 462c853e

arch/powerpc/platforms/cell/spu_base.c

+2 −1
Original line number Diff line number Diff line
@@ -240,6 +240,7 @@ spu_irq_class_1(int irq, void *data, struct pt_regs *regs) 
	stat  = in_be64(&spu->priv1->int_stat_class1_RW) & mask;

	dar   = in_be64(&spu->priv1->mfc_dar_RW);

	dsisr = in_be64(&spu->priv1->mfc_dsisr_RW);

	if (stat & 2) /* mapping fault */

		out_be64(&spu->priv1->mfc_dsisr_RW, 0UL);

	out_be64(&spu->priv1->int_stat_class1_RW, stat);

	spin_unlock(&spu->register_lock);