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Commit 3643e0e8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel 

* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel:
  drm/i915/dvo: Report LVDS attached to ch701x as connected
  Revert "drm/i915/bios: Reverse order of 100/120 Mhz SSC clocks"
  drm/i915: Verify Ironlake eDP presence on DP_A using the capability fuse
  drm/i915, intel_ips: When i915 loads after IPS, make IPS relink to i915.
  drm/i915/sdvo: Add hdmi connector properties after initing the connector
  drm/i915: Set the required VFMUNIT clock gating disable on Ironlake.
parents e983dc24 cc6455f8

drivers/gpu/drm/i915/dvo_ch7017.c

+1 −1
Original line number Diff line number Diff line
@@ -242,7 +242,7 @@ static bool ch7017_init(struct intel_dvo_device *dvo, 


static enum drm_connector_status ch7017_detect(struct intel_dvo_device *dvo)

{

	return connector_status_unknown;

	return connector_status_connected;

}



static enum drm_mode_status ch7017_mode_valid(struct intel_dvo_device *dvo,

drivers/gpu/drm/i915/i915_dma.c

+23 −0
Original line number Diff line number Diff line
@@ -34,6 +34,7 @@ 
#include "i915_drm.h"

#include "i915_drv.h"

#include "i915_trace.h"

#include "../../../platform/x86/intel_ips.h"

#include <linux/pci.h>

#include <linux/vgaarb.h>

#include <linux/acpi.h>
@@ -1870,6 +1871,26 @@ bool i915_gpu_turbo_disable(void) 
}

EXPORT_SYMBOL_GPL(i915_gpu_turbo_disable);



/**

 * Tells the intel_ips driver that the i915 driver is now loaded, if

 * IPS got loaded first.

 *

 * This awkward dance is so that neither module has to depend on the

 * other in order for IPS to do the appropriate communication of

 * GPU turbo limits to i915.

 */

static void

ips_ping_for_i915_load(void)

{

	void (*link)(void);



	link = symbol_get(ips_link_to_i915_driver);

	if (link) {

		link();

		symbol_put(ips_link_to_i915_driver);

	}

}



/**

 * i915_driver_load - setup chip and create an initial config

 * @dev: DRM device
@@ -2075,6 +2096,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
	dev_priv->mchdev_lock = &mchdev_lock;

	spin_unlock(&mchdev_lock);



	ips_ping_for_i915_load();



	return 0;



out_workqueue_free:

drivers/gpu/drm/i915/i915_reg.h

+10 −0
Original line number Diff line number Diff line
@@ -2471,6 +2471,9 @@ 
# define MARIUNIT_CLOCK_GATE_DISABLE		(1 << 18)

# define SVSMUNIT_CLOCK_GATE_DISABLE		(1 << 1)



#define PCH_3DCGDIS1		0x46024

# define VFMUNIT_CLOCK_GATE_DISABLE		(1 << 11)



#define FDI_PLL_FREQ_CTL        0x46030

#define  FDI_PLL_FREQ_CHANGE_REQUEST    (1<<24)

#define  FDI_PLL_FREQ_LOCK_LIMIT_MASK   0xfff00
@@ -2588,6 +2591,13 @@ 
#define ILK_DISPLAY_CHICKEN2	0x42004

#define  ILK_DPARB_GATE	(1<<22)

#define  ILK_VSDPFD_FULL	(1<<21)

#define ILK_DISPLAY_CHICKEN_FUSES	0x42014

#define  ILK_INTERNAL_GRAPHICS_DISABLE	(1<<31)

#define  ILK_INTERNAL_DISPLAY_DISABLE	(1<<30)

#define  ILK_DISPLAY_DEBUG_DISABLE	(1<<29)

#define  ILK_HDCP_DISABLE		(1<<25)

#define  ILK_eDP_A_DISABLE		(1<<24)

#define  ILK_DESKTOP			(1<<23)

#define ILK_DSPCLK_GATE		0x42020

#define  ILK_DPARB_CLK_GATE	(1<<5)

/* According to spec this bit 7/8/9 of 0x42020 should be set to enable FBC */

drivers/gpu/drm/i915/intel_bios.c

+1 −1
Original line number Diff line number Diff line
@@ -270,7 +270,7 @@ parse_general_features(struct drm_i915_private *dev_priv, 
					general->ssc_freq ? 66 : 48;

			else if (IS_GEN5(dev) || IS_GEN6(dev))

				dev_priv->lvds_ssc_freq =

					general->ssc_freq ? 120 : 100;

					general->ssc_freq ? 100 : 120;

			else

				dev_priv->lvds_ssc_freq =

					general->ssc_freq ? 100 : 96;

drivers/gpu/drm/i915/intel_display.c

+20 −1
Original line number Diff line number Diff line
@@ -5379,6 +5379,23 @@ static int intel_encoder_clones(struct drm_device *dev, int type_mask) 
	return index_mask;

}



static bool has_edp_a(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;



	if (!IS_MOBILE(dev))

		return false;



	if ((I915_READ(DP_A) & DP_DETECTED) == 0)

		return false;



	if (IS_GEN5(dev) &&

	    (I915_READ(ILK_DISPLAY_CHICKEN_FUSES) & ILK_eDP_A_DISABLE))

		return false;



	return true;

}



static void intel_setup_outputs(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -5396,7 +5413,7 @@ static void intel_setup_outputs(struct drm_device *dev) 
	if (HAS_PCH_SPLIT(dev)) {

		dpd_is_edp = intel_dpd_is_edp(dev);



		if (IS_MOBILE(dev) && (I915_READ(DP_A) & DP_DETECTED))

		if (has_edp_a(dev))

			intel_dp_init(dev, DP_A);



		if (dpd_is_edp && (I915_READ(PCH_DP_D) & DP_DETECTED))
@@ -5825,6 +5842,8 @@ void intel_init_clock_gating(struct drm_device *dev) 
			I915_WRITE(PCH_3DCGDIS0,

				   MARIUNIT_CLOCK_GATE_DISABLE |

				   SVSMUNIT_CLOCK_GATE_DISABLE);

			I915_WRITE(PCH_3DCGDIS1,

				   VFMUNIT_CLOCK_GATE_DISABLE);

		}



		I915_WRITE(PCH_DSPCLK_GATE_D, dspclk_gate);