[POWERPC] mpc82xx: Add pq2fads board support. (3611f2ad) · Commits · e / devices / android_kernel_teracube_2e

arch/powerpc/boot/dts/pq2fads.dts

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		/*
		* Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
		*
		* Copyright 2007 Freescale Semiconductor Inc.
		*
		* This program is free software; you can redistribute it and/or modify it
		* under the terms of the GNU General Public License as published by the
		* Free Software Foundation; either version 2 of the License, or (at your
		* option) any later version.
		*/

		/ {
		model = "pq2fads";
		compatible = "fsl,pq2fads";
		#address-cells = <1>;
		#size-cells = <1>;

		cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
		device_type = "cpu";
		reg = <0>;
		d-cache-line-size = <d#32>;
		i-cache-line-size = <d#32>;
		d-cache-size = <d#16384>;
		i-cache-size = <d#16384>;
		timebase-frequency = <0>;
		clock-frequency = <0>;
		};
		};

		memory {
		device_type = "memory";
		reg = <0 0>;
		};

		localbus@f0010100 {
		compatible = "fsl,mpc8280-localbus",
		"fsl,pq2-localbus";
		#address-cells = <2>;
		#size-cells = <1>;
		reg = <f0010100 60>;

		ranges = <0 0 fe000000 00800000
		1 0 f4500000 00008000
		8 0 f8200000 00008000>;

		flash@0,0 {
		compatible = "jedec-flash";
		reg = <0 0 800000>;
		bank-width = <4>;
		device-width = <1>;
		};

		bcsr@1,0 {
		reg = <1 0 20>;
		compatible = "fsl,pq2fads-bcsr";
		};

		PCI_PIC: pic@8,0 {
		#interrupt-cells = <1>;
		interrupt-controller;
		reg = <8 0 8>;
		compatible = "fsl,pq2ads-pci-pic";
		interrupt-parent = <&PIC>;
		interrupts = <18 8>;
		};
		};

		pci@f0010800 {
		device_type = "pci";
		reg = <f0010800 10c f00101ac 8 f00101c4 8>;
		compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		clock-frequency = <d#66000000>;
		interrupt-map-mask = <f800 0 0 7>;
		interrupt-map = <
		/* IDSEL 0x16 */
		b000 0 0 1 &PCI_PIC 0
		b000 0 0 2 &PCI_PIC 1
		b000 0 0 3 &PCI_PIC 2
		b000 0 0 4 &PCI_PIC 3

		/* IDSEL 0x17 */
		b800 0 0 1 &PCI_PIC 4
		b800 0 0 2 &PCI_PIC 5
		b800 0 0 3 &PCI_PIC 6
		b800 0 0 4 &PCI_PIC 7

		/* IDSEL 0x18 */
		c000 0 0 1 &PCI_PIC 8
		c000 0 0 2 &PCI_PIC 9
		c000 0 0 3 &PCI_PIC a
		c000 0 0 4 &PCI_PIC b>;

		interrupt-parent = <&PIC>;
		interrupts = <12 8>;
		ranges = <42000000 0 80000000 80000000 0 20000000
		02000000 0 a0000000 a0000000 0 20000000
		01000000 0 00000000 f6000000 0 02000000>;
		};

		soc@f0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "fsl,mpc8280", "fsl,pq2-soc";
		ranges = <00000000 f0000000 00053000>;

		// Temporary -- will go away once kernel uses ranges for get_immrbase().
		reg = <f0000000 00053000>;

		cpm@119c0 {
		#address-cells = <1>;
		#size-cells = <1>;
		#interrupt-cells = <2>;
		compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
		reg = <119c0 30 0 2000>;
		ranges;

		brg@119f0 {
		compatible = "fsl,mpc8280-brg",
		"fsl,cpm2-brg",
		"fsl,cpm-brg";
		reg = <119f0 10 115f0 10>;
		};

		serial@11a00 {
		device_type = "serial";
		compatible = "fsl,mpc8280-scc-uart",
		"fsl,cpm2-scc-uart";
		reg = <11a00 20 8000 100>;
		interrupts = <28 8>;
		interrupt-parent = <&PIC>;
		fsl,cpm-brg = <1>;
		fsl,cpm-command = <00800000>;
		};

		serial@11a20 {
		device_type = "serial";
		compatible = "fsl,mpc8280-scc-uart",
		"fsl,cpm2-scc-uart";
		reg = <11a20 20 8100 100>;
		interrupts = <29 8>;
		interrupt-parent = <&PIC>;
		fsl,cpm-brg = <2>;
		fsl,cpm-command = <04a00000>;
		};

		ethernet@11320 {
		device_type = "network";
		compatible = "fsl,mpc8280-fcc-enet",
		"fsl,cpm2-fcc-enet";
		reg = <11320 20 8500 100 113b0 1>;
		interrupts = <21 8>;
		interrupt-parent = <&PIC>;
		phy-handle = <&PHY0>;
		linux,network-index = <0>;
		fsl,cpm-command = <16200300>;
		};

		ethernet@11340 {
		device_type = "network";
		compatible = "fsl,mpc8280-fcc-enet",
		"fsl,cpm2-fcc-enet";
		reg = <11340 20 8600 100 113d0 1>;
		interrupts = <22 8>;
		interrupt-parent = <&PIC>;
		phy-handle = <&PHY1>;
		linux,network-index = <1>;
		fsl,cpm-command = <1a400300>;
		local-mac-address = [00 e0 0c 00 79 01];
		};

		mdio@10d40 {
		device_type = "mdio";
		compatible = "fsl,pq2fads-mdio-bitbang",
		"fsl,mpc8280-mdio-bitbang",
		"fsl,cpm2-mdio-bitbang";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <10d40 14>;
		fsl,mdio-pin = <9>;
		fsl,mdc-pin = <a>;

		PHY0: ethernet-phy@0 {
		interrupt-parent = <&PIC>;
		interrupts = <19 2>;
		reg = <0>;
		device_type = "ethernet-phy";
		};

		PHY1: ethernet-phy@1 {
		interrupt-parent = <&PIC>;
		interrupts = <19 2>;
		reg = <3>;
		device_type = "ethernet-phy";
		};
		};

		usb@11b60 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "fsl,mpc8280-usb",
		"fsl,cpm2-usb";
		reg = <11b60 18 8b00 100>;
		interrupt-parent = <&PIC>;
		interrupts = <b 8>;
		fsl,cpm-command = <2e600000>;
		};
		};

		PIC: interrupt-controller@10c00 {
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <10c00 80>;
		compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
		};

		};

		chosen {
		linux,stdout-path = "/soc/cpm/serial@11a00";
		};
		};

arch/powerpc/configs/pq2fads_defconfig

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File added.

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arch/powerpc/platforms/82xx/Kconfig

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		@@ -15,6 +15,17 @@ config MPC8272_ADS
		help
		This option enables support for the MPC8272 ADS board

		config PQ2FADS
		bool "Freescale PQ2FADS"
		select DEFAULT_UIMAGE
		select PQ2ADS
		select 8260
		select FSL_SOC
		select PQ2_ADS_PCI_PIC if PCI
		select PPC_CPM_NEW_BINDING
		help
		This option enables support for the PQ2FADS board

		endchoice

		config PQ2ADS

arch/powerpc/platforms/82xx/Makefile

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		@@ -4,3 +4,4 @@
		obj-$(CONFIG_MPC8272_ADS) += mpc8272_ads.o
		obj-$(CONFIG_CPM2) += pq2.o
		obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
		obj-$(CONFIG_PQ2FADS) += pq2fads.o

arch/powerpc/platforms/82xx/pq2fads.c

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		/*
		* PQ2FADS board support
		*
		* Copyright 2007 Freescale Semiconductor, Inc.
		* Author: Scott Wood <scottwood@freescale.com>
		*
		* Loosely based on mp82xx ADS support by Vitaly Bordug <vbordug@ru.mvista.com>
		* Copyright (c) 2006 MontaVista Software, Inc.
		*
		* This program is free software; you can redistribute it and/or modify it
		* under the terms of the GNU General Public License version 2 as published
		* by the Free Software Foundation.
		*/

		#include <linux/init.h>
		#include <linux/interrupt.h>
		#include <linux/fsl_devices.h>

		#include <asm/io.h>
		#include <asm/cpm2.h>
		#include <asm/udbg.h>
		#include <asm/machdep.h>
		#include <asm/of_platform.h>
		#include <asm/time.h>

		#include <sysdev/fsl_soc.h>
		#include <sysdev/cpm2_pic.h>

		#include "pq2ads.h"
		#include "pq2.h"

		static void __init pq2fads_pic_init(void)
		{
		struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
		if (!np) {
		printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
		return;
		}

		cpm2_pic_init(np);
		of_node_put(np);

		/* Initialize stuff for the 82xx CPLD IC and install demux */
		pq2ads_pci_init_irq();
		}

		struct cpm_pin {
		int port, pin, flags;
		};

		static struct cpm_pin pq2fads_pins[] = {
		/* SCC1 */
		{3, 30, CPM_PIN_OUTPUT \| CPM_PIN_SECONDARY},
		{3, 31, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},

		/* SCC2 */
		{3, 27, CPM_PIN_OUTPUT \| CPM_PIN_PRIMARY},
		{3, 28, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},

		/* FCC2 */
		{1, 18, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 19, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 20, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 21, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 22, CPM_PIN_OUTPUT \| CPM_PIN_PRIMARY},
		{1, 23, CPM_PIN_OUTPUT \| CPM_PIN_PRIMARY},
		{1, 24, CPM_PIN_OUTPUT \| CPM_PIN_PRIMARY},
		{1, 25, CPM_PIN_OUTPUT \| CPM_PIN_PRIMARY},
		{1, 26, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 27, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 28, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 29, CPM_PIN_OUTPUT \| CPM_PIN_SECONDARY},
		{1, 30, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 31, CPM_PIN_OUTPUT \| CPM_PIN_PRIMARY},
		{2, 18, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{2, 19, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},

		/* FCC3 */
		{1, 4, CPM_PIN_OUTPUT \| CPM_PIN_PRIMARY},
		{1, 5, CPM_PIN_OUTPUT \| CPM_PIN_PRIMARY},
		{1, 6, CPM_PIN_OUTPUT \| CPM_PIN_PRIMARY},
		{1, 7, CPM_PIN_OUTPUT \| CPM_PIN_PRIMARY},
		{1, 8, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 9, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 10, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 11, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 12, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 13, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 14, CPM_PIN_OUTPUT \| CPM_PIN_PRIMARY},
		{1, 15, CPM_PIN_OUTPUT \| CPM_PIN_PRIMARY},
		{1, 16, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{1, 17, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{2, 16, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		{2, 17, CPM_PIN_INPUT \| CPM_PIN_PRIMARY},
		};

		static void __init init_ioports(void)
		{
		int i;

		for (i = 0; i < ARRAY_SIZE(pq2fads_pins); i++) {
		struct cpm_pin *pin = &pq2fads_pins[i];
		cpm2_set_pin(pin->port, pin->pin, pin->flags);
		}

		cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
		cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
		cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
		cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
		cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
		cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
		cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
		cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
		}

		static void __init pq2fads_setup_arch(void)
		{
		struct device_node *np;
		__be32 __iomem *bcsr;

		if (ppc_md.progress)
		ppc_md.progress("pq2fads_setup_arch()", 0);

		cpm2_reset();

		np = of_find_compatible_node(NULL, NULL, "fsl,pq2fads-bcsr");
		if (!np) {
		printk(KERN_ERR "No fsl,pq2fads-bcsr in device tree\n");
		return;
		}

		bcsr = of_iomap(np, 0);
		if (!bcsr) {
		printk(KERN_ERR "Cannot map BCSR registers\n");
		return;
		}

		of_node_put(np);

		/* Enable the serial and ethernet ports */

		clrbits32(&bcsr[1], BCSR1_RS232_EN1 \| BCSR1_RS232_EN2 \| BCSR1_FETHIEN);
		setbits32(&bcsr[1], BCSR1_FETH_RST);

		clrbits32(&bcsr[3], BCSR3_FETHIEN2);
		setbits32(&bcsr[3], BCSR3_FETH2_RST);

		iounmap(bcsr);

		init_ioports();

		/* Enable external IRQs */
		clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_siumcr, 0x0c000000);

		pq2_init_pci();

		if (ppc_md.progress)
		ppc_md.progress("pq2fads_setup_arch(), finish", 0);
		}

		/*
		* Called very early, device-tree isn't unflattened
		*/
		static int __init pq2fads_probe(void)
		{
		unsigned long root = of_get_flat_dt_root();
		return of_flat_dt_is_compatible(root, "fsl,pq2fads");
		}

		static struct of_device_id __initdata of_bus_ids[] = {
		{ .name = "soc", },
		{ .name = "cpm", },
		{ .name = "localbus", },
		{},
		};

		static int __init declare_of_platform_devices(void)
		{
		if (!machine_is(pq2fads))
		return 0;

		/* Publish the QE devices */
		of_platform_bus_probe(NULL, of_bus_ids, NULL);
		return 0;
		}
		device_initcall(declare_of_platform_devices);

		define_machine(pq2fads)
		{
		.name = "Freescale PQ2FADS",
		.probe = pq2fads_probe,
		.setup_arch = pq2fads_setup_arch,
		.init_IRQ = pq2fads_pic_init,
		.get_irq = cpm2_get_irq,
		.calibrate_decr = generic_calibrate_decr,
		.restart = pq2_restart,
		.progress = udbg_progress,
		};