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Commit 35e4d8ca authored by Elizabeth Ferdman's avatar Elizabeth Ferdman Committed by Greg Kroah-Hartman
Browse files

staging: sm750fb: conform to block comment style 



Fix 2 checkpatch errors:
-Block comments use * on subsequent lines,
-Block comments use a trailing */ on a separate line
to conform to block commenting style.

Signed-off-by: default avatarElizabeth Ferdman <gnudevliz@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5cf62679

drivers/staging/sm750fb/ddk750_display.h

+24 −26
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ 
#define DDK750_DISPLAY_H__



/* panel path select

	80000[29:28]

 *	80000[29:28]

 */



#define PNL_2_OFFSET 0
@@ -13,8 +13,8 @@ 




/* primary timing & plane enable bit

	1: 80000[8] & 80000[2] on

	0: both off

 *	1: 80000[8] & 80000[2] on

 *	0: both off

 */

#define PRI_TP_OFFSET 4

#define PRI_TP_MASK BIT(PRI_TP_OFFSET)
@@ -24,7 +24,7 @@ 




/* panel sequency status

	80000[27:24]

 *	80000[27:24]

 */

#define PNL_SEQ_OFFSET 6

#define PNL_SEQ_MASK BIT(PNL_SEQ_OFFSET)
@@ -33,7 +33,7 @@ 
#define PNL_SEQ_OFF ((0 << PNL_SEQ_OFFSET) | PNL_SEQ_USAGE)



/* dual digital output

	80000[19]

 *	80000[19]

 */

#define DUAL_TFT_OFFSET 8

#define DUAL_TFT_MASK BIT(DUAL_TFT_OFFSET)
@@ -42,8 +42,8 @@ 
#define DUAL_TFT_OFF ((0 << DUAL_TFT_OFFSET) | DUAL_TFT_USAGE)



/* secondary timing & plane enable bit

	1:80200[8] & 80200[2] on

	0: both off

 *	1:80200[8] & 80200[2] on

 *	0: both off

 */

#define SEC_TP_OFFSET 5

#define SEC_TP_MASK BIT(SEC_TP_OFFSET)
@@ -52,7 +52,7 @@ 
#define SEC_TP_OFF ((0x0 << SEC_TP_OFFSET) | SEC_TP_USAGE)



/* crt path select

	80200[19:18]

 *	80200[19:18]

 */

#define CRT_2_OFFSET 2

#define CRT_2_MASK (3 << CRT_2_OFFSET)
@@ -62,7 +62,7 @@ 




/* DAC affect both DVI and DSUB

	4[20]

 *	4[20]

 */

#define DAC_OFFSET 7

#define DAC_MASK BIT(DAC_OFFSET)
@@ -71,7 +71,7 @@ 
#define DAC_OFF ((0x1 << DAC_OFFSET) | DAC_USAGE)



/* DPMS only affect D-SUB head

	0[31:30]

 *	0[31:30]

 */

#define DPMS_OFFSET 9

#define DPMS_MASK (3 << DPMS_OFFSET)
@@ -81,18 +81,16 @@ 






/*

	LCD1 means panel path TFT1  & panel path DVI (so enable DAC)

	CRT means crt path DSUB

/* LCD1 means panel path TFT1  & panel path DVI (so enable DAC)

 * CRT means crt path DSUB

 */

typedef enum _disp_output_t {

	do_LCD1_PRI = PNL_2_PRI | PRI_TP_ON | PNL_SEQ_ON | DAC_ON,

	do_LCD1_SEC = PNL_2_SEC | SEC_TP_ON | PNL_SEQ_ON | DAC_ON,

	do_LCD2_PRI = CRT_2_PRI | PRI_TP_ON | DUAL_TFT_ON,

	do_LCD2_SEC = CRT_2_SEC | SEC_TP_ON | DUAL_TFT_ON,

	/*

	do_DSUB_PRI = CRT_2_PRI|PRI_TP_ON|DPMS_ON|DAC_ON,

	do_DSUB_SEC = CRT_2_SEC|SEC_TP_ON|DPMS_ON|DAC_ON,

	/* do_DSUB_PRI = CRT_2_PRI | PRI_TP_ON | DPMS_ON|DAC_ON,

	 * do_DSUB_SEC = CRT_2_SEC | SEC_TP_ON | DPMS_ON|DAC_ON,

	 */

	do_CRT_PRI = CRT_2_PRI | PRI_TP_ON | DPMS_ON | DAC_ON,

	do_CRT_SEC = CRT_2_SEC | SEC_TP_ON | DPMS_ON | DAC_ON,

drivers/staging/sm750fb/ddk750_hwi2c.c

+1 −1
Original line number Diff line number Diff line
@@ -21,7 +21,7 @@ unsigned char bus_speed_mode 
	POKE32(GPIO_MUX, value);



	/* Enable Hardware I2C power.

	 TODO: Check if we need to enable GPIO power?

	 * TODO: Check if we need to enable GPIO power?

	 */

	enableI2C(1);

drivers/staging/sm750fb/ddk750_mode.c

+13 −14
Original line number Diff line number Diff line
@@ -4,14 +4,13 @@ 
#include "ddk750_mode.h"

#include "ddk750_chip.h"



/*

	SM750LE only:

    This function takes care extra registers and bit fields required to set

    up a mode in SM750LE



	Explanation about Display Control register:

    HW only supports 7 predefined pixel clocks, and clock select is

    in bit 29:27 of	Display Control register.

/* SM750LE only:

 * This function takes care extra registers and bit fields required to set

 * up a mode in SM750LE

 *

 * Explanation about Display Control register:

 * HW only supports 7 predefined pixel clocks, and clock select is

 * in bit 29:27 of Display Control register.

 */

static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, unsigned long dispControl)

{
@@ -21,9 +20,9 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, 
	y = pModeParam->vertical_display_end;



	/* SM750LE has to set up the top-left and bottom-right

	   registers as well.

	   Note that normal SM750/SM718 only use those two register for

	   auto-centering mode.

	 * registers as well.

	 * Note that normal SM750/SM718 only use those two register for

	 * auto-centering mode.

	 */

	POKE32(CRT_AUTO_CENTERING_TL, 0);
@@ -33,8 +32,8 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, 
		((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK));



	/* Assume common fields in dispControl have been properly set before

	   calling this function.

	   This function only sets the extra fields in dispControl.

	 * calling this function.

	 * This function only sets the extra fields in dispControl.

	 */



	/* Clear bit 29:27 of display control register */

drivers/staging/sm750fb/ddk750_sii164.c

+4 −3
Original line number Diff line number Diff line
@@ -174,8 +174,8 @@ long sii164InitChip( 
		i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config);



		/* De-skew enabled with default 111b value.

		   This will fix some artifacts problem in some mode on board 2.2.

		   Somehow this fix does not affect board 2.1.

		 * This fixes some artifacts problem in some mode on board 2.2.

		 * Somehow this fix does not affect board 2.1.

		 */

		if (deskewEnable == 0)

			config = SII164_DESKEW_DISABLE;
@@ -344,7 +344,8 @@ void sii164EnableHotPlugDetection( 
	detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT);



	/* Depending on each DVI controller, need to enable the hot plug based on each

	   individual chip design. */

	 * individual chip design.

	 */

	if (enableHotPlug != 0)

		sii164SelectHotPlugDetectionMode(SII164_HOTPLUG_USE_MDI);

	else

drivers/staging/sm750fb/ddk750_swi2c.c

+6 −6
Original line number Diff line number Diff line
@@ -89,11 +89,11 @@ static void sw_i2c_wait(void) 
	 * always be non-zero,which makes the while loop

	 * never finish.

	 * use non-ultimate for loop below is safe

	 * */

	 */



    /* Change wait algorithm to use PCI bus clock,

       it's more reliable than counter loop ..

       write 0x61 to 0x3ce and read from 0x3cf

     * it's more reliable than counter loop ..

     * write 0x61 to 0x3ce and read from 0x3cf

     */

	int i, tmp;
@@ -501,7 +501,7 @@ long sm750_sw_i2c_write_reg( 
	sw_i2c_start();



	/* Send the device address and read the data. All should return success

	   in order for the writing processed to be successful

	 * in order for the writing processed to be successful

	 */

	if ((sw_i2c_write_byte(addr) != 0) ||

	    (sw_i2c_write_byte(reg) != 0) ||