Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 3587e625 authored by Marti Raudsepp's avatar Marti Raudsepp Committed by Bjorn Helgaas
Browse files

PCI: Add ACS quirk for AMD A88X southbridge devices 

AMD has confirmed that peer-to-peer between two southbridge functions does
not occur.

Add a quirk to indicate that these functions are isolated even though they
don't have an ACS capability.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=81841


Signed-off-by: default avatarMarti Raudsepp <marti@juffo.org>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarJoel Schopp <joel.schopp@amd.com>
parent 100ebb2c

drivers/pci/quirks.c

+7 −0
Original line number Diff line number Diff line
@@ -3533,6 +3533,11 @@ DECLARE_PCI_FIXUP_HEADER(0x8086, 0x244e, quirk_use_pcie_bridge_dma_alias); 
 * 1002:439d SB7x0/SB8x0/SB9x0 LPC host controller

 * 1002:4384 SBx00 PCI to PCI Bridge

 * 1002:4399 SB7x0/SB8x0/SB9x0 USB OHCI2 Controller

 *

 * https://bugzilla.kernel.org/show_bug.cgi?id=81841#c15

 *

 * 1022:780f [AMD] FCH PCI Bridge

 * 1022:7809 [AMD] FCH USB OHCI Controller

 */

static int pci_quirk_amd_sb_acs(struct pci_dev *dev, u16 acs_flags)

{
@@ -3643,6 +3648,8 @@ static const struct pci_dev_acs_enabled { 
	{ PCI_VENDOR_ID_ATI, 0x439d, pci_quirk_amd_sb_acs },

	{ PCI_VENDOR_ID_ATI, 0x4384, pci_quirk_amd_sb_acs },

	{ PCI_VENDOR_ID_ATI, 0x4399, pci_quirk_amd_sb_acs },

	{ PCI_VENDOR_ID_AMD, 0x780f, pci_quirk_amd_sb_acs },

	{ PCI_VENDOR_ID_AMD, 0x7809, pci_quirk_amd_sb_acs },

	{ PCI_VENDOR_ID_SOLARFLARE, 0x0903, pci_quirk_mf_endpoint_acs },

	{ PCI_VENDOR_ID_SOLARFLARE, 0x0923, pci_quirk_mf_endpoint_acs },

	{ PCI_VENDOR_ID_INTEL, 0x10C6, pci_quirk_mf_endpoint_acs },