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Commit 325f0a18 authored by Kamlakant Patel's avatar Kamlakant Patel Committed by Ralf Baechle
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MIPS: Netlogic: Use chip_data for irq_chip methods 



Update mips/netlogic/common/irq.c and mips/pci/msi-xlp.c to use chip_data
to store interrupt controller data pointer. It uses handler_data now,
and that causes errors when an API (like the GPIO subsystem) tries to
use the handler data.

Signed-off-by: default avatarKamlakant Patel <kamlakant.patel@broadcom.com>
Signed-off-by: default avatarJayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10817/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 832f5dac

arch/mips/netlogic/common/irq.c

+6 −6
Original line number Diff line number Diff line
@@ -87,7 +87,7 @@ struct nlm_pic_irq { 
static void xlp_pic_enable(struct irq_data *d)

{

	unsigned long flags;

	struct nlm_pic_irq *pd = irq_data_get_irq_handler_data(d);

	struct nlm_pic_irq *pd = irq_data_get_irq_chip_data(d);



	BUG_ON(!pd);

	spin_lock_irqsave(&pd->node->piclock, flags);
@@ -97,7 +97,7 @@ static void xlp_pic_enable(struct irq_data *d) 


static void xlp_pic_disable(struct irq_data *d)

{

	struct nlm_pic_irq *pd = irq_data_get_irq_handler_data(d);

	struct nlm_pic_irq *pd = irq_data_get_irq_chip_data(d);

	unsigned long flags;



	BUG_ON(!pd);
@@ -108,7 +108,7 @@ static void xlp_pic_disable(struct irq_data *d) 


static void xlp_pic_mask_ack(struct irq_data *d)

{

	struct nlm_pic_irq *pd = irq_data_get_irq_handler_data(d);

	struct nlm_pic_irq *pd = irq_data_get_irq_chip_data(d);



	clear_c0_eimr(pd->picirq);

	ack_c0_eirr(pd->picirq);
@@ -116,7 +116,7 @@ static void xlp_pic_mask_ack(struct irq_data *d) 


static void xlp_pic_unmask(struct irq_data *d)

{

	struct nlm_pic_irq *pd = irq_data_get_irq_handler_data(d);

	struct nlm_pic_irq *pd = irq_data_get_irq_chip_data(d);



	BUG_ON(!pd);
@@ -193,7 +193,7 @@ void nlm_setup_pic_irq(int node, int picirq, int irq, int irt) 
	pic_data->picirq = picirq;

	pic_data->node = nlm_get_node(node);

	irq_set_chip_and_handler(xirq, &xlp_pic, handle_level_irq);

	irq_set_handler_data(xirq, pic_data);

	irq_set_chip_data(xirq, pic_data);

}



void nlm_set_pic_extra_ack(int node, int irq, void (*xack)(struct irq_data *))
@@ -202,7 +202,7 @@ void nlm_set_pic_extra_ack(int node, int irq, void (*xack)(struct irq_data *)) 
	int xirq;



	xirq = nlm_irq_to_xirq(node, irq);

	pic_data = irq_get_handler_data(xirq);

	pic_data = irq_get_chip_data(xirq);

	if (WARN_ON(!pic_data))

		return;

	pic_data->extra_ack = xack;

arch/mips/pci/msi-xlp.c

+10 −10
Original line number Diff line number Diff line
@@ -131,7 +131,7 @@ struct xlp_msi_data { 
 */

static void xlp_msi_enable(struct irq_data *d)

{

	struct xlp_msi_data *md = irq_data_get_irq_handler_data(d);

	struct xlp_msi_data *md = irq_data_get_irq_chip_data(d);

	unsigned long flags;

	int vec;
@@ -148,7 +148,7 @@ static void xlp_msi_enable(struct irq_data *d) 


static void xlp_msi_disable(struct irq_data *d)

{

	struct xlp_msi_data *md = irq_data_get_irq_handler_data(d);

	struct xlp_msi_data *md = irq_data_get_irq_chip_data(d);

	unsigned long flags;

	int vec;
@@ -165,7 +165,7 @@ static void xlp_msi_disable(struct irq_data *d) 


static void xlp_msi_mask_ack(struct irq_data *d)

{

	struct xlp_msi_data *md = irq_data_get_irq_handler_data(d);

	struct xlp_msi_data *md = irq_data_get_irq_chip_data(d);

	int link, vec;



	link = nlm_irq_msilink(d->irq);
@@ -211,7 +211,7 @@ static void xlp_msix_mask_ack(struct irq_data *d) 
	msixvec = nlm_irq_msixvec(d->irq);

	link = nlm_irq_msixlink(msixvec);

	pci_msi_mask_irq(d);

	md = irq_data_get_irq_handler_data(d);

	md = irq_data_get_irq_chip_data(d);



	/* Ack MSI on bridge */

	if (cpu_is_xlp9xx()) {
@@ -302,7 +302,7 @@ static int xlp_setup_msi(uint64_t lnkbase, int node, int link, 
	/* Get MSI data for the link */

	lirq = PIC_PCIE_LINK_MSI_IRQ(link);

	xirq = nlm_irq_to_xirq(node, nlm_link_msiirq(link, 0));

	md = irq_get_handler_data(xirq);

	md = irq_get_chip_data(xirq);

	msiaddr = MSI_LINK_ADDR(node, link);



	spin_lock_irqsave(&md->msi_lock, flags);
@@ -409,7 +409,7 @@ static int xlp_setup_msix(uint64_t lnkbase, int node, int link, 
	/* Get MSI data for the link */

	lirq = PIC_PCIE_MSIX_IRQ(link);

	xirq = nlm_irq_to_xirq(node, nlm_link_msixirq(link, 0));

	md = irq_get_handler_data(xirq);

	md = irq_get_chip_data(xirq);

	msixaddr = MSIX_LINK_ADDR(node, link);



	spin_lock_irqsave(&md->msi_lock, flags);
@@ -485,7 +485,7 @@ void __init xlp_init_node_msi_irqs(int node, int link) 
	irq = nlm_irq_to_xirq(node, nlm_link_msiirq(link, 0));

	for (i = irq; i < irq + XLP_MSIVEC_PER_LINK; i++) {

		irq_set_chip_and_handler(i, &xlp_msi_chip, handle_level_irq);

		irq_set_handler_data(i, md);

		irq_set_chip_data(i, md);

	}



	for (i = 0; i < XLP_MSIXVEC_PER_LINK ; i++) {
@@ -508,7 +508,7 @@ void __init xlp_init_node_msi_irqs(int node, int link) 
		/* Initialize MSI-X extended irq space for the link  */

		irq = nlm_irq_to_xirq(node, nlm_link_msixirq(link, i));

		irq_set_chip_and_handler(irq, &xlp_msix_chip, handle_level_irq);

		irq_set_handler_data(irq, md);

		irq_set_chip_data(irq, md);

	}

}
@@ -520,7 +520,7 @@ void nlm_dispatch_msi(int node, int lirq) 


	link = lirq - PIC_PCIE_LINK_MSI_IRQ_BASE;

	irqbase = nlm_irq_to_xirq(node, nlm_link_msiirq(link, 0));

	md = irq_get_handler_data(irqbase);

	md = irq_get_chip_data(irqbase);

	if (cpu_is_xlp9xx())

		status = nlm_read_reg(md->lnkbase, PCIE_9XX_MSI_STATUS) &

						md->msi_enabled_mask;
@@ -550,7 +550,7 @@ void nlm_dispatch_msix(int node, int lirq) 


	link = lirq - PIC_PCIE_MSIX_IRQ_BASE;

	irqbase = nlm_irq_to_xirq(node, nlm_link_msixirq(link, 0));

	md = irq_get_handler_data(irqbase);

	md = irq_get_chip_data(irqbase);

	if (cpu_is_xlp9xx())

		status = nlm_read_reg(md->lnkbase, PCIE_9XX_MSIX_STATUSX(link));

	else