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Commit 31858479 authored by Joonyoung Shim's avatar Joonyoung Shim Committed by Kukjin Kim
Browse files

ARM: S3C64XX: Remove gpio-bank-X header files 



The gpio-bank-X header files of S3C64XX have definitions
which can be substituted by other common GPIO API.

Signed-off-by: default avatarJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 14587b8d

arch/arm/mach-s3c64xx/dev-spi.c

+7 −13
Original line number Diff line number Diff line
@@ -16,7 +16,6 @@ 


#include <mach/dma.h>

#include <mach/map.h>

#include <mach/gpio-bank-c.h>

#include <mach/spi-clocks.h>

#include <mach/irqs.h>
@@ -40,23 +39,15 @@ static char *spi_src_clks[] = { 
 */

static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev)

{

	unsigned int base;



	switch (pdev->id) {

	case 0:

		s3c_gpio_cfgpin(S3C64XX_GPC(0), S3C64XX_GPC0_SPI_MISO0);

		s3c_gpio_cfgpin(S3C64XX_GPC(1), S3C64XX_GPC1_SPI_CLKO);

		s3c_gpio_cfgpin(S3C64XX_GPC(2), S3C64XX_GPC2_SPI_MOSIO);

		s3c_gpio_setpull(S3C64XX_GPC(0), S3C_GPIO_PULL_UP);

		s3c_gpio_setpull(S3C64XX_GPC(1), S3C_GPIO_PULL_UP);

		s3c_gpio_setpull(S3C64XX_GPC(2), S3C_GPIO_PULL_UP);

		base = S3C64XX_GPC(0);

		break;



	case 1:

		s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_SPI_MISO1);

		s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_SPI_CLK1);

		s3c_gpio_cfgpin(S3C64XX_GPC(6), S3C64XX_GPC6_SPI_MOSI1);

		s3c_gpio_setpull(S3C64XX_GPC(4), S3C_GPIO_PULL_UP);

		s3c_gpio_setpull(S3C64XX_GPC(5), S3C_GPIO_PULL_UP);

		s3c_gpio_setpull(S3C64XX_GPC(6), S3C_GPIO_PULL_UP);

		base = S3C64XX_GPC(4);

		break;



	default:
@@ -64,6 +55,9 @@ static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev) 
		return -EINVAL;

	}



	s3c_gpio_cfgall_range(base, 3,

			      S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);



	return 0;

}

arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h

deleted100644 → 0
+0 −48
Original line number Diff line number Diff line 
/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h

 *

 * Copyright 2008 Openmoko, Inc.

 * Copyright 2008 Simtec Electronics

 * 	Ben Dooks <ben@simtec.co.uk>

 * 	http://armlinux.simtec.co.uk/

 *

 * GPIO Bank A register and configuration definitions

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

*/



#define S3C64XX_GPACON			(S3C64XX_GPA_BASE + 0x00)

#define S3C64XX_GPADAT			(S3C64XX_GPA_BASE + 0x04)

#define S3C64XX_GPAPUD			(S3C64XX_GPA_BASE + 0x08)

#define S3C64XX_GPACONSLP		(S3C64XX_GPA_BASE + 0x0c)

#define S3C64XX_GPAPUDSLP		(S3C64XX_GPA_BASE + 0x10)



#define S3C64XX_GPA_CONMASK(__gpio)	(0xf << ((__gpio) * 4))

#define S3C64XX_GPA_INPUT(__gpio)	(0x0 << ((__gpio) * 4))

#define S3C64XX_GPA_OUTPUT(__gpio)	(0x1 << ((__gpio) * 4))



#define S3C64XX_GPA0_UART_RXD0		(0x02 << 0)

#define S3C64XX_GPA0_EINT_G1_0		(0x07 << 0)



#define S3C64XX_GPA1_UART_TXD0		(0x02 << 4)

#define S3C64XX_GPA1_EINT_G1_1		(0x07 << 4)



#define S3C64XX_GPA2_UART_nCTS0		(0x02 << 8)

#define S3C64XX_GPA2_EINT_G1_2		(0x07 << 8)



#define S3C64XX_GPA3_UART_nRTS0		(0x02 << 12)

#define S3C64XX_GPA3_EINT_G1_3		(0x07 << 12)



#define S3C64XX_GPA4_UART_RXD1		(0x02 << 16)

#define S3C64XX_GPA4_EINT_G1_4		(0x07 << 16)



#define S3C64XX_GPA5_UART_TXD1		(0x02 << 20)

#define S3C64XX_GPA5_EINT_G1_5		(0x07 << 20)



#define S3C64XX_GPA6_UART_nCTS1		(0x02 << 24)

#define S3C64XX_GPA6_EINT_G1_6		(0x07 << 24)



#define S3C64XX_GPA7_UART_nRTS1		(0x02 << 28)

#define S3C64XX_GPA7_EINT_G1_7		(0x07 << 28)

arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h

deleted100644 → 0
+0 −60
Original line number Diff line number Diff line 
/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h

 *

 * Copyright 2008 Openmoko, Inc.

 * Copyright 2008 Simtec Electronics

 * 	Ben Dooks <ben@simtec.co.uk>

 * 	http://armlinux.simtec.co.uk/

 *

 * GPIO Bank B register and configuration definitions

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

*/



#define S3C64XX_GPBCON			(S3C64XX_GPB_BASE + 0x00)

#define S3C64XX_GPBDAT			(S3C64XX_GPB_BASE + 0x04)

#define S3C64XX_GPBPUD			(S3C64XX_GPB_BASE + 0x08)

#define S3C64XX_GPBCONSLP		(S3C64XX_GPB_BASE + 0x0c)

#define S3C64XX_GPBPUDSLP		(S3C64XX_GPB_BASE + 0x10)



#define S3C64XX_GPB_CONMASK(__gpio)	(0xf << ((__gpio) * 4))

#define S3C64XX_GPB_INPUT(__gpio)	(0x0 << ((__gpio) * 4))

#define S3C64XX_GPB_OUTPUT(__gpio)	(0x1 << ((__gpio) * 4))



#define S3C64XX_GPB0_UART_RXD2		(0x02 << 0)

#define S3C64XX_GPB0_EXTDMA_REQ		(0x03 << 0)

#define S3C64XX_GPB0_IrDA_RXD		(0x04 << 0)

#define S3C64XX_GPB0_ADDR_CF0		(0x05 << 0)

#define S3C64XX_GPB0_EINT_G1_8		(0x07 << 0)



#define S3C64XX_GPB1_UART_TXD2		(0x02 << 4)

#define S3C64XX_GPB1_EXTDMA_ACK		(0x03 << 4)

#define S3C64XX_GPB1_IrDA_TXD		(0x04 << 4)

#define S3C64XX_GPB1_ADDR_CF1		(0x05 << 4)

#define S3C64XX_GPB1_EINT_G1_9		(0x07 << 4)



#define S3C64XX_GPB2_UART_RXD3		(0x02 << 8)

#define S3C64XX_GPB2_IrDA_RXD		(0x03 << 8)

#define S3C64XX_GPB2_EXTDMA_REQ		(0x04 << 8)

#define S3C64XX_GPB2_ADDR_CF2		(0x05 << 8)

#define S3C64XX_GPB2_I2C_SCL1		(0x06 << 8)

#define S3C64XX_GPB2_EINT_G1_10		(0x07 << 8)



#define S3C64XX_GPB3_UART_TXD3		(0x02 << 12)

#define S3C64XX_GPB3_IrDA_TXD		(0x03 << 12)

#define S3C64XX_GPB3_EXTDMA_ACK		(0x04 << 12)

#define S3C64XX_GPB3_I2C_SDA1		(0x06 << 12)

#define S3C64XX_GPB3_EINT_G1_11		(0x07 << 12)



#define S3C64XX_GPB4_IrDA_SDBW		(0x02 << 16)

#define S3C64XX_GPB4_CAM_FIELD		(0x03 << 16)

#define S3C64XX_GPB4_CF_DATA_DIR	(0x04 << 16)

#define S3C64XX_GPB4_EINT_G1_12		(0x07 << 16)



#define S3C64XX_GPB5_I2C_SCL0		(0x02 << 20)

#define S3C64XX_GPB5_EINT_G1_13		(0x07 << 20)



#define S3C64XX_GPB6_I2C_SDA0		(0x02 << 24)

#define S3C64XX_GPB6_EINT_G1_14		(0x07 << 24)

arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h

deleted100644 → 0
+0 −53
Original line number Diff line number Diff line 
/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h

 *

 * Copyright 2008 Openmoko, Inc.

 * Copyright 2008 Simtec Electronics

 * 	Ben Dooks <ben@simtec.co.uk>

 * 	http://armlinux.simtec.co.uk/

 *

 * GPIO Bank C register and configuration definitions

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

*/



#define S3C64XX_GPCCON			(S3C64XX_GPC_BASE + 0x00)

#define S3C64XX_GPCDAT			(S3C64XX_GPC_BASE + 0x04)

#define S3C64XX_GPCPUD			(S3C64XX_GPC_BASE + 0x08)

#define S3C64XX_GPCCONSLP		(S3C64XX_GPC_BASE + 0x0c)

#define S3C64XX_GPCPUDSLP		(S3C64XX_GPC_BASE + 0x10)



#define S3C64XX_GPC_CONMASK(__gpio)	(0xf << ((__gpio) * 4))

#define S3C64XX_GPC_INPUT(__gpio)	(0x0 << ((__gpio) * 4))

#define S3C64XX_GPC_OUTPUT(__gpio)	(0x1 << ((__gpio) * 4))



#define S3C64XX_GPC0_SPI_MISO0		(0x02 << 0)

#define S3C64XX_GPC0_EINT_G2_0		(0x07 << 0)



#define S3C64XX_GPC1_SPI_CLKO		(0x02 << 4)

#define S3C64XX_GPC1_EINT_G2_1		(0x07 << 4)



#define S3C64XX_GPC2_SPI_MOSIO		(0x02 << 8)

#define S3C64XX_GPC2_EINT_G2_2		(0x07 << 8)



#define S3C64XX_GPC3_SPI_nCSO		(0x02 << 12)

#define S3C64XX_GPC3_EINT_G2_3		(0x07 << 12)



#define S3C64XX_GPC4_SPI_MISO1		(0x02 << 16)

#define S3C64XX_GPC4_MMC2_CMD		(0x03 << 16)

#define S3C64XX_GPC4_I2S_V40_DO0	(0x05 << 16)

#define S3C64XX_GPC4_EINT_G2_4		(0x07 << 16)



#define S3C64XX_GPC5_SPI_CLK1		(0x02 << 20)

#define S3C64XX_GPC5_MMC2_CLK		(0x03 << 20)

#define S3C64XX_GPC5_I2S_V40_DO1	(0x05 << 20)

#define S3C64XX_GPC5_EINT_G2_5		(0x07 << 20)



#define S3C64XX_GPC6_SPI_MOSI1		(0x02 << 24)

#define S3C64XX_GPC6_EINT_G2_6		(0x07 << 24)



#define S3C64XX_GPC7_SPI_nCS1		(0x02 << 28)

#define S3C64XX_GPC7_I2S_V40_DO2	(0x05 << 28)

#define S3C64XX_GPC7_EINT_G2_7		(0x07 << 28)

arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h

deleted100644 → 0
+0 −49
Original line number Diff line number Diff line 
/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h

 *

 * Copyright 2008 Openmoko, Inc.

 * Copyright 2008 Simtec Electronics

 * 	Ben Dooks <ben@simtec.co.uk>

 * 	http://armlinux.simtec.co.uk/

 *

 * GPIO Bank D register and configuration definitions

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

*/



#define S3C64XX_GPDCON			(S3C64XX_GPD_BASE + 0x00)

#define S3C64XX_GPDDAT			(S3C64XX_GPD_BASE + 0x04)

#define S3C64XX_GPDPUD			(S3C64XX_GPD_BASE + 0x08)

#define S3C64XX_GPDCONSLP		(S3C64XX_GPD_BASE + 0x0c)

#define S3C64XX_GPDPUDSLP		(S3C64XX_GPD_BASE + 0x10)



#define S3C64XX_GPD_CONMASK(__gpio)	(0xf << ((__gpio) * 4))

#define S3C64XX_GPD_INPUT(__gpio)	(0x0 << ((__gpio) * 4))

#define S3C64XX_GPD_OUTPUT(__gpio)	(0x1 << ((__gpio) * 4))



#define S3C64XX_GPD0_PCM0_SCLK		(0x02 << 0)

#define S3C64XX_GPD0_I2S0_CLK		(0x03 << 0)

#define S3C64XX_GPD0_AC97_BITCLK	(0x04 << 0)

#define S3C64XX_GPD0_EINT_G3_0		(0x07 << 0)



#define S3C64XX_GPD1_PCM0_EXTCLK	(0x02 << 4)

#define S3C64XX_GPD1_I2S0_CDCLK		(0x03 << 4)

#define S3C64XX_GPD1_AC97_nRESET	(0x04 << 4)

#define S3C64XX_GPD1_EINT_G3_1		(0x07 << 4)



#define S3C64XX_GPD2_PCM0_FSYNC		(0x02 << 8)

#define S3C64XX_GPD2_I2S0_LRCLK		(0x03 << 8)

#define S3C64XX_GPD2_AC97_SYNC		(0x04 << 8)

#define S3C64XX_GPD2_EINT_G3_2		(0x07 << 8)



#define S3C64XX_GPD3_PCM0_SIN		(0x02 << 12)

#define S3C64XX_GPD3_I2S0_DI		(0x03 << 12)

#define S3C64XX_GPD3_AC97_SDI		(0x04 << 12)

#define S3C64XX_GPD3_EINT_G3_3		(0x07 << 12)



#define S3C64XX_GPD4_PCM0_SOUT		(0x02 << 16)

#define S3C64XX_GPD4_I2S0_D0		(0x03 << 16)

#define S3C64XX_GPD4_AC97_SDO		(0x04 << 16)

#define S3C64XX_GPD4_EINT_G3_4		(0x07 << 16)