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Commit 3073d8c0 authored by Eran Harary's avatar Eran Harary Committed by Emmanuel Grumbach
Browse files

iwlwifi: pcie: disable APMG configurations for family 8000 



APMG HW block was removed in this NIC, hence, no need to
configure it.

Signed-off-by: default avatarEran Harary <eran.harary@intel.com>
Signed-off-by: default avatarEmmanuel Grumbach <emmanuel.grumbach@intel.com>
parent ae2b21b0

drivers/net/wireless/iwlwifi/mvm/ops.c

+4 −3
Original line number Diff line number Diff line
@@ -185,6 +185,7 @@ static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode) 
	 * (PCIe power is lost before PERST# is asserted), causing ME FW

	 * to lose ownership and not being able to obtain it back.

	 */

	if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)

		iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG,

				       APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,

				       ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);

drivers/net/wireless/iwlwifi/pcie/trans.c

+16 −11
Original line number Diff line number Diff line
@@ -203,11 +203,13 @@ static int iwl_pcie_apm_init(struct iwl_trans *trans) 
	/*

	 * Enable DMA clock and wait for it to stabilize.

	 *

	 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits

	 * do not disable clocks.  This preserves any hardware bits already

	 * set by default in "CLK_CTRL_REG" after reset.

	 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0"

	 * bits do not disable clocks.  This preserves any hardware

	 * bits already set by default in "CLK_CTRL_REG" after reset.

	 */

	iwl_write_prph(trans, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);

	if (trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {

		iwl_write_prph(trans, APMG_CLK_EN_REG,

			       APMG_CLK_VAL_DMA_CLK_RQT);

		udelay(20);



		/* Disable L1-Active */
@@ -215,7 +217,9 @@ static int iwl_pcie_apm_init(struct iwl_trans *trans) 
				  APMG_PCIDEV_STT_VAL_L1_ACT_DIS);



		/* Clear the interrupt in APMG if the NIC is in RFKILL */

	iwl_write_prph(trans, APMG_RTC_INT_STT_REG, APMG_RTC_INT_STT_RFKILL);

		iwl_write_prph(trans, APMG_RTC_INT_STT_REG,

			       APMG_RTC_INT_STT_RFKILL);

	}



	set_bit(STATUS_DEVICE_ENABLED, &trans->status);
@@ -273,6 +277,7 @@ static int iwl_pcie_nic_init(struct iwl_trans *trans) 


	spin_unlock(&trans_pcie->irq_lock);



	if (trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)

		iwl_pcie_set_pwr(trans, false);



	iwl_op_mode_nic_config(trans->op_mode);

drivers/net/wireless/iwlwifi/pcie/tx.c

+3 −2
Original line number Diff line number Diff line
@@ -705,6 +705,7 @@ void iwl_pcie_tx_start(struct iwl_trans *trans, u32 scd_base_addr) 
			   reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);



	/* Enable L1-Active */

	if (trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)

		iwl_clear_bits_prph(trans, APMG_PCIDEV_STT_REG,

				    APMG_PCIDEV_STT_VAL_L1_ACT_DIS);

}