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Commit 2ffd795a authored by Hauke Mehrtens's avatar Hauke Mehrtens Committed by John W. Linville
Browse files

brcmsmac: remove pcie_extendL1timer() 



This is now done by calling bcma_core_pci_extend_L1time()

Signed-off-by: default avatarHauke Mehrtens <hauke@hauke-m.de>
Tested-by: default avatarArend van Spriel <arend@broadcom.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 60dda6c0

drivers/net/wireless/brcm80211/brcmsmac/aiutils.c

+3 −3
Original line number Diff line number Diff line
@@ -794,8 +794,7 @@ void ai_pci_up(struct si_pub *sih) 
	}



	if (PCIE(sih))

		pcicore_up(sii->pch, SI_PCIUP);



		bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci, true);

}



/* Unconfigure and/or apply various WARs when going down */
@@ -812,7 +811,8 @@ void ai_pci_down(struct si_pub *sih) 
		bcma_core_set_clockmode(cc, BCMA_CLKMODE_DYNAMIC);

	}



	pcicore_down(sii->pch, SI_PCIDOWN);

	if (PCIE(sih))

		bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci, false);

}



/*

drivers/net/wireless/brcm80211/brcmsmac/nicpci.c

+0 −72
Original line number Diff line number Diff line
@@ -240,78 +240,6 @@ void pcicore_deinit(struct pcicore_info *pch) 
	kfree(pch);

}



/* ***** Register Access API */

static uint

pcie_readreg(struct bcma_device *core, uint addrtype, uint offset)

{

	uint retval = 0xFFFFFFFF;



	switch (addrtype) {

	case PCIE_CONFIGREGS:

		bcma_write32(core, PCIEREGOFFS(configaddr), offset);

		(void)bcma_read32(core, PCIEREGOFFS(configaddr));

		retval = bcma_read32(core, PCIEREGOFFS(configdata));

		break;

	case PCIE_PCIEREGS:

		bcma_write32(core, PCIEREGOFFS(pcieindaddr), offset);

		(void)bcma_read32(core, PCIEREGOFFS(pcieindaddr));

		retval = bcma_read32(core, PCIEREGOFFS(pcieinddata));

		break;

	}



	return retval;

}



static uint pcie_writereg(struct bcma_device *core, uint addrtype,

			  uint offset, uint val)

{

	switch (addrtype) {

	case PCIE_CONFIGREGS:

		bcma_write32(core, PCIEREGOFFS(configaddr), offset);

		bcma_write32(core, PCIEREGOFFS(configdata), val);

		break;

	case PCIE_PCIEREGS:

		bcma_write32(core, PCIEREGOFFS(pcieindaddr), offset);

		bcma_write32(core, PCIEREGOFFS(pcieinddata), val);

		break;

	default:

		break;

	}

	return 0;

}



/* ***** Support functions ***** */

static void pcie_extendL1timer(struct pcicore_info *pi, bool extend)

{

	u32 w;



	w = pcie_readreg(pi->core, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG);

	if (extend)

		w |= PCIE_ASPMTIMER_EXTEND;

	else

		w &= ~PCIE_ASPMTIMER_EXTEND;

	pcie_writereg(pi->core, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG, w);

	w = pcie_readreg(pi->core, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG);

}



void pcicore_up(struct pcicore_info *pi, int state)

{

	if (!pi || ai_get_buscoretype(pi->sih) != PCIE_CORE_ID)

		return;



	/* Restore L1 timer for better performance */

	pcie_extendL1timer(pi, true);

}



void pcicore_down(struct pcicore_info *pi, int state)

{

	if (!pi || ai_get_buscoretype(pi->sih) != PCIE_CORE_ID)

		return;



	/* Reduce L1 timer for better power savings */

	pcie_extendL1timer(pi, false);

}



void pcicore_fixcfg(struct pcicore_info *pi)

{

	struct bcma_device *core = pi->core;