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Commit 2f8501b9 authored Jun 05, 2011 by Gabor Juhos Committed by Ralf Baechle Dec 07, 2011

MIPS: ath79: Change number of available IRQs



The status register of the miscellaneous interrupt controller is 32 bits
wide, but the actual value of NR_IRQS covers only 8 of them. Change
NR_IRQS in order to make all of those interrupt lines usable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2441/


Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent 5611cc45

arch/mips/include/asm/mach-ath79/irq.h

+2 −2

Original line number	Original line	Diff line number	Diff line
	@@ -10,10 +10,10 @@
	#define __ASM_MACH_ATH79_IRQ_H		#define __ASM_MACH_ATH79_IRQ_H

	#define MIPS_CPU_IRQ_BASE 0		#define MIPS_CPU_IRQ_BASE 0
	#define NR_IRQS 16		#define NR_IRQS 40

	#define ATH79_MISC_IRQ_BASE 8		#define ATH79_MISC_IRQ_BASE 8
	#define ATH79_MISC_IRQ_COUNT 8		#define ATH79_MISC_IRQ_COUNT 32

	#define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2)		#define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2)
	#define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3)		#define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3)