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Commit 2f1cad0d authored by Andrzej Hajda's avatar Andrzej Hajda Committed by Inki Dae
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dt-bindings: exynos_hdmi: add bindings for Exynos5433 variant 



Exynos5433 variant of HDMI requires different set of clocks and sysreg
phandle to system registers.

Signed-off-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Reviewed-by: default avatarKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
parent fec81a3c

Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt

+24 −3
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ Required properties: 
	1) "samsung,exynos4210-hdmi"

	2) "samsung,exynos4212-hdmi"

	3) "samsung,exynos5420-hdmi"

	4) "samsung,exynos5433-hdmi"

- reg: physical base address of the hdmi and length of memory mapped

	region.

- interrupts: interrupt number to the cpu.
@@ -12,6 +13,11 @@ Required properties: 
	a) phandle of the gpio controller node.

	b) pin number within the gpio controller.

	c) optional flags and pull up/down.

- ddc: phandle to the hdmi ddc node

- phy: phandle to the hdmi phy node

- samsung,syscon-phandle: phandle for system controller node for PMU.



Required properties for Exynos 4210, 4212, 5420 and 5433:

- clocks: list of clock IDs from SoC clock driver.

	a) hdmi: Gate of HDMI IP bus clock.

	b) sclk_hdmi: Gate of HDMI special clock.
@@ -25,9 +31,24 @@ Required properties: 
		sclk_pixel.

- clock-names: aliases as per driver requirements for above clock IDs:

	"hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi".

- ddc: phandle to the hdmi ddc node

- phy: phandle to the hdmi phy node

- samsung,syscon-phandle: phandle for system controller node for PMU.



Required properties for Exynos 5433:

- clocks: list of clock specifiers according to common clock bindings.

	a) hdmi_pclk: Gate of HDMI IP APB bus.

	b) hdmi_i_pclk: Gate of HDMI-PHY IP APB bus.

	d) i_tmds_clk: Gate of HDMI TMDS clock.

	e) i_pixel_clk: Gate of HDMI pixel clock.

	f) i_spdif_clk: Gate of HDMI SPDIF clock.

	g) oscclk: Oscillator clock, used as parent of following *_user clocks

		in case HDMI-PHY is not operational.

	h) tmds_clko: TMDS clock generated by HDMI-PHY.

	i) tmds_clko_user: MUX used to switch between oscclk and tmds_clko,

		respectively if HDMI-PHY is off and operational.

	j) pixel_clko: Pixel clock generated by HDMI-PHY.

	k) pixel_clko_user: MUX used to switch between oscclk and pixel_clko,

		respectively if HDMI-PHY is off and operational.

- clock-names: aliases for above clock specfiers.

- samsung,sysreg: handle to syscon used to control the system registers.



Example: