Commit 2f19d080 authored Jul 05, 2011 by David Daney Committed by Ralf Baechle Sep 24, 2011

MIPS: Octeon: Enable C0_UserLocal probing.



Octeon2 processor cores have a UserLocal register.  Remove the hard
coded negative probe and allow the standard probing to detect this
feature.

Signed-off-by: David Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2578/


Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent 0f4ccbc8

arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h

+0 −1

Original line number	Diff line number	Diff line
		@@ -54,7 +54,6 @@
		#define cpu_has_mips_r2_exec_hazard 0
		#define cpu_has_dsp 0
		#define cpu_has_mipsmt 0
		#define cpu_has_userlocal 0
		#define cpu_has_vint 0
		#define cpu_has_veic 0
		#define cpu_hwrena_impl_bits 0xc0000000