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Commit 2df7a25c authored by Robin Murphy's avatar Robin Murphy Committed by Will Deacon
Browse files

iommu/arm-smmu: Clean up DMA API usage 



With the correct DMA API calls now integrated into the io-pgtable code,
let that handle the flushing of non-coherent page table updates.

Signed-off-by: default avatarRobin Murphy <robin.murphy@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent f8d54961

drivers/iommu/arm-smmu.c

+6 −16
Original line number Original line Diff line number Diff line
@@ -611,24 +611,13 @@ static void arm_smmu_tlb_inv_range_nosync(unsigned long iova, size_t size, 
static void arm_smmu_flush_pgtable(void *addr, size_t size, void *cookie)

static void arm_smmu_flush_pgtable(void *addr, size_t size, void *cookie)

{

{

	struct arm_smmu_domain *smmu_domain = cookie;

	struct arm_smmu_domain *smmu_domain = cookie;

	struct arm_smmu_device *smmu = smmu_domain->smmu;

	unsigned long offset = (unsigned long)addr & ~PAGE_MASK;







	/* Ensure new page tables are visible to the hardware walker */

	if (smmu->features & ARM_SMMU_FEAT_COHERENT_WALK) {

		dsb(ishst);

	} else {

	/*

	/*

		 * If the SMMU can't walk tables in the CPU caches, treat them

	 * Ensure new page tables are visible to a coherent hardware walker.

		 * like non-coherent DMA since we need to flush the new entries

	 * The page table code deals with flushing for the non-coherent case.

		 * all the way out to memory. There's no possibility of

		 * recursion here as the SMMU table walker will not be wired

		 * through another SMMU.

	 */

	 */

		dma_map_page(smmu->dev, virt_to_page(addr), offset, size,

	if (smmu_domain->smmu->features & ARM_SMMU_FEAT_COHERENT_WALK)

			     DMA_TO_DEVICE);

		dsb(ishst);

	}

}

}





static struct iommu_gather_ops arm_smmu_gather_ops = {

static struct iommu_gather_ops arm_smmu_gather_ops = {
@@ -899,6 +888,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, 
		.ias		= ias,

		.ias		= ias,

		.oas		= oas,

		.oas		= oas,

		.tlb		= &arm_smmu_gather_ops,

		.tlb		= &arm_smmu_gather_ops,

		.iommu_dev	= smmu->dev,

	};

	};





	smmu_domain->smmu = smmu;

	smmu_domain->smmu = smmu;