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Commit 2de6905f authored by Imre Deak's avatar Imre Deak Committed by Daniel Vetter
Browse files

drm/i915: ilk-ivb: replace !is_pch_edp() with port==PORT_A



On ILK-IVB the CPU side eDP is always on port-A.

Also reduce somewhat the debug verbosity.

v2:
- reduce debug verbosity

Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent d8e8b582
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+3 −7
Original line number Diff line number Diff line
@@ -5045,7 +5045,6 @@ static void ironlake_init_pch_refclk(struct drm_device *dev)
	u32 val, final;
	bool has_lvds = false;
	bool has_cpu_edp = false;
	bool has_pch_edp = false;
	bool has_panel = false;
	bool has_ck505 = false;
	bool can_ssc = false;
@@ -5060,9 +5059,7 @@ static void ironlake_init_pch_refclk(struct drm_device *dev)
			break;
		case INTEL_OUTPUT_EDP:
			has_panel = true;
			if (intel_encoder_is_pch_edp(&encoder->base))
				has_pch_edp = true;
			else
			if (enc_to_dig_port(&encoder->base)->port == PORT_A)
				has_cpu_edp = true;
			break;
		}
@@ -5076,9 +5073,8 @@ static void ironlake_init_pch_refclk(struct drm_device *dev)
		can_ssc = true;
	}

	DRM_DEBUG_KMS("has_panel %d has_lvds %d has_pch_edp %d has_cpu_edp %d has_ck505 %d\n",
		      has_panel, has_lvds, has_pch_edp, has_cpu_edp,
		      has_ck505);
	DRM_DEBUG_KMS("has_panel %d has_lvds %d has_ck505 %d\n",
		      has_panel, has_lvds, has_ck505);

	/* Ironlake: try to setup display ref clock before DPLL
	 * enabling. This is only under driver's control after