Loading drivers/gpu/drm/radeon/ci_dpm.c +47 −11 Original line number Diff line number Diff line Loading @@ -40,6 +40,20 @@ #define VOLTAGE_VID_OFFSET_SCALE1 625 #define VOLTAGE_VID_OFFSET_SCALE2 100 static const struct ci_pt_defaults defaults_hawaii_xt = { 1, 0xF, 0xFD, 0x19, 5, 0x14, 0, 0xB0000, { 0x84, 0x0, 0x0, 0x7F, 0x0, 0x0, 0x5A, 0x60, 0x51, 0x8E, 0x79, 0x6B, 0x5F, 0x90, 0x79 }, { 0x1EA, 0x1EA, 0x1EA, 0x224, 0x224, 0x224, 0x24F, 0x24F, 0x24F, 0x28E, 0x28E, 0x28E, 0x2BC, 0x2BC, 0x2BC } }; static const struct ci_pt_defaults defaults_hawaii_pro = { 1, 0xF, 0xFD, 0x19, 5, 0x14, 0, 0x65062, { 0x93, 0x0, 0x0, 0x97, 0x0, 0x0, 0x6B, 0x60, 0x51, 0x95, 0x79, 0x6B, 0x5F, 0x90, 0x79 }, { 0x1EA, 0x1EA, 0x1EA, 0x224, 0x224, 0x224, 0x24F, 0x24F, 0x24F, 0x28E, 0x28E, 0x28E, 0x2BC, 0x2BC, 0x2BC } }; static const struct ci_pt_defaults defaults_bonaire_xt = { 1, 0xF, 0xFD, 0x19, 5, 45, 0, 0xB0000, Loading Loading @@ -203,6 +217,22 @@ static void ci_initialize_powertune_defaults(struct radeon_device *rdev) case 0x6641: pi->powertune_defaults = &defaults_saturn_pro; break; case 0x67B8: case 0x67B0: case 0x67A0: case 0x67A1: case 0x67A2: case 0x67A8: case 0x67A9: case 0x67AA: case 0x67B9: case 0x67BE: pi->powertune_defaults = &defaults_hawaii_xt; break; case 0x67BA: case 0x67B1: pi->powertune_defaults = &defaults_hawaii_pro; break; } pi->dte_tj_offset = 0; Loading Loading @@ -5142,9 +5172,15 @@ int ci_dpm_init(struct radeon_device *rdev) rdev->pm.dpm.dyn_state.valid_mclk_values.count = 0; rdev->pm.dpm.dyn_state.valid_mclk_values.values = NULL; if (rdev->family == CHIP_HAWAII) { pi->thermal_temp_setting.temperature_low = 94500; pi->thermal_temp_setting.temperature_high = 95000; pi->thermal_temp_setting.temperature_shutdown = 104000; } else { pi->thermal_temp_setting.temperature_low = 99500; pi->thermal_temp_setting.temperature_high = 100000; pi->thermal_temp_setting.temperature_shutdown = 104000; } pi->uvd_enabled = false; Loading drivers/gpu/drm/radeon/ci_smc.c +4 −0 Original line number Diff line number Diff line Loading @@ -217,6 +217,10 @@ int ci_load_smc_ucode(struct radeon_device *rdev, u32 limit) ucode_start_address = BONAIRE_SMC_UCODE_START; ucode_size = BONAIRE_SMC_UCODE_SIZE; break; case CHIP_HAWAII: ucode_start_address = HAWAII_SMC_UCODE_START; ucode_size = HAWAII_SMC_UCODE_SIZE; break; default: DRM_ERROR("unknown asic in smc ucode loader\n"); BUG(); Loading drivers/gpu/drm/radeon/radeon_pm.c +1 −0 Original line number Diff line number Diff line Loading @@ -1256,6 +1256,7 @@ int radeon_pm_init(struct radeon_device *rdev) case CHIP_BONAIRE: case CHIP_KABINI: case CHIP_KAVERI: case CHIP_HAWAII: /* DPM requires the RLC, RV770+ dGPU requires SMC */ if (!rdev->rlc_fw) rdev->pm.pm_method = PM_METHOD_PROFILE; Loading Loading
drivers/gpu/drm/radeon/ci_dpm.c +47 −11 Original line number Diff line number Diff line Loading @@ -40,6 +40,20 @@ #define VOLTAGE_VID_OFFSET_SCALE1 625 #define VOLTAGE_VID_OFFSET_SCALE2 100 static const struct ci_pt_defaults defaults_hawaii_xt = { 1, 0xF, 0xFD, 0x19, 5, 0x14, 0, 0xB0000, { 0x84, 0x0, 0x0, 0x7F, 0x0, 0x0, 0x5A, 0x60, 0x51, 0x8E, 0x79, 0x6B, 0x5F, 0x90, 0x79 }, { 0x1EA, 0x1EA, 0x1EA, 0x224, 0x224, 0x224, 0x24F, 0x24F, 0x24F, 0x28E, 0x28E, 0x28E, 0x2BC, 0x2BC, 0x2BC } }; static const struct ci_pt_defaults defaults_hawaii_pro = { 1, 0xF, 0xFD, 0x19, 5, 0x14, 0, 0x65062, { 0x93, 0x0, 0x0, 0x97, 0x0, 0x0, 0x6B, 0x60, 0x51, 0x95, 0x79, 0x6B, 0x5F, 0x90, 0x79 }, { 0x1EA, 0x1EA, 0x1EA, 0x224, 0x224, 0x224, 0x24F, 0x24F, 0x24F, 0x28E, 0x28E, 0x28E, 0x2BC, 0x2BC, 0x2BC } }; static const struct ci_pt_defaults defaults_bonaire_xt = { 1, 0xF, 0xFD, 0x19, 5, 45, 0, 0xB0000, Loading Loading @@ -203,6 +217,22 @@ static void ci_initialize_powertune_defaults(struct radeon_device *rdev) case 0x6641: pi->powertune_defaults = &defaults_saturn_pro; break; case 0x67B8: case 0x67B0: case 0x67A0: case 0x67A1: case 0x67A2: case 0x67A8: case 0x67A9: case 0x67AA: case 0x67B9: case 0x67BE: pi->powertune_defaults = &defaults_hawaii_xt; break; case 0x67BA: case 0x67B1: pi->powertune_defaults = &defaults_hawaii_pro; break; } pi->dte_tj_offset = 0; Loading Loading @@ -5142,9 +5172,15 @@ int ci_dpm_init(struct radeon_device *rdev) rdev->pm.dpm.dyn_state.valid_mclk_values.count = 0; rdev->pm.dpm.dyn_state.valid_mclk_values.values = NULL; if (rdev->family == CHIP_HAWAII) { pi->thermal_temp_setting.temperature_low = 94500; pi->thermal_temp_setting.temperature_high = 95000; pi->thermal_temp_setting.temperature_shutdown = 104000; } else { pi->thermal_temp_setting.temperature_low = 99500; pi->thermal_temp_setting.temperature_high = 100000; pi->thermal_temp_setting.temperature_shutdown = 104000; } pi->uvd_enabled = false; Loading
drivers/gpu/drm/radeon/ci_smc.c +4 −0 Original line number Diff line number Diff line Loading @@ -217,6 +217,10 @@ int ci_load_smc_ucode(struct radeon_device *rdev, u32 limit) ucode_start_address = BONAIRE_SMC_UCODE_START; ucode_size = BONAIRE_SMC_UCODE_SIZE; break; case CHIP_HAWAII: ucode_start_address = HAWAII_SMC_UCODE_START; ucode_size = HAWAII_SMC_UCODE_SIZE; break; default: DRM_ERROR("unknown asic in smc ucode loader\n"); BUG(); Loading
drivers/gpu/drm/radeon/radeon_pm.c +1 −0 Original line number Diff line number Diff line Loading @@ -1256,6 +1256,7 @@ int radeon_pm_init(struct radeon_device *rdev) case CHIP_BONAIRE: case CHIP_KABINI: case CHIP_KAVERI: case CHIP_HAWAII: /* DPM requires the RLC, RV770+ dGPU requires SMC */ if (!rdev->rlc_fw) rdev->pm.pm_method = PM_METHOD_PROFILE; Loading