Commit 2d02b8bd authored Feb 26, 2016 by Timothy Pearson Committed by Dave Airlie Mar 02, 2016

drm/ast: Fix incorrect register check for DRAM width



During DRAM initialization on certain ASpeed devices, an incorrect
bit (bit 10) was checked in the "SDRAM Bus Width Status" register
to determine DRAM width.

Query bit 6 instead in accordance with the Aspeed AST2050 datasheet v1.05.

Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>

parent ead8f34c

drivers/gpu/drm/ast/ast_main.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -227,7 +227,7 @@ static int ast_get_dram_info(struct drm_device *dev)
		} while (ast_read32(ast, 0x10000) != 0x01);
		data = ast_read32(ast, 0x10004);

		if (data & 0x400)
		if (data & 0x40)
		ast->dram_bus_width = 16;
		else
		ast->dram_bus_width = 32;