Merge branch 'x86-apic-for-linus' of... (2c9e88a1) · Commits · e / devices / android_kernel_teracube_2e

arch/x86/kernel/apic/apic.c

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -1430,7 +1430,7 @@ void enable_x2apic(void)
	rdmsr(MSR_IA32_APICBASE, msr, msr2);		rdmsr(MSR_IA32_APICBASE, msr, msr2);
	if (!(msr & X2APIC_ENABLE)) {		if (!(msr & X2APIC_ENABLE)) {
	printk_once(KERN_INFO "Enabling x2apic\n");		printk_once(KERN_INFO "Enabling x2apic\n");
	wrmsr(MSR_IA32_APICBASE, msr \| X2APIC_ENABLE, 0);		wrmsr(MSR_IA32_APICBASE, msr \| X2APIC_ENABLE, msr2);
	}		}
	}		}
	#endif /* CONFIG_X86_X2APIC */		#endif /* CONFIG_X86_X2APIC */

arch/x86/kernel/apic/io_apic.c

+66 −25

Original line number	Original line	Diff line number	Diff line
	@@ -1295,6 +1295,16 @@ static int setup_ioapic_entry(int apic_id, int irq,
	* irq handler will do the explicit EOI to the io-apic.		* irq handler will do the explicit EOI to the io-apic.
	*/		*/
	ir_entry->vector = pin;		ir_entry->vector = pin;

			apic_printk(APIC_VERBOSE, KERN_DEBUG "IOAPIC[%d]: "
			"Set IRTE entry (P:%d FPD:%d Dst_Mode:%d "
			"Redir_hint:%d Trig_Mode:%d Dlvry_Mode:%X "
			"Avail:%X Vector:%02X Dest:%08X "
			"SID:%04X SQ:%X SVT:%X)\n",
			apic_id, irte.present, irte.fpd, irte.dst_mode,
			irte.redir_hint, irte.trigger_mode, irte.dlvry_mode,
			irte.avail, irte.vector, irte.dest_id,
			irte.sid, irte.sq, irte.svt);
	} else {		} else {
	entry->delivery_mode = apic->irq_delivery_mode;		entry->delivery_mode = apic->irq_delivery_mode;
	entry->dest_mode = apic->irq_dest_mode;		entry->dest_mode = apic->irq_dest_mode;
	@@ -1337,9 +1347,9 @@ static void setup_ioapic_irq(int apic_id, int pin, unsigned int irq,

	apic_printk(APIC_VERBOSE,KERN_DEBUG		apic_printk(APIC_VERBOSE,KERN_DEBUG
	"IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> "		"IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> "
	"IRQ %d Mode:%i Active:%i)\n",		"IRQ %d Mode:%i Active:%i Dest:%d)\n",
	apic_id, mpc_ioapic_id(apic_id), pin, cfg->vector,		apic_id, mpc_ioapic_id(apic_id), pin, cfg->vector,
	irq, trigger, polarity);		irq, trigger, polarity, dest);


	if (setup_ioapic_entry(mpc_ioapic_id(apic_id), irq, &entry,		if (setup_ioapic_entry(mpc_ioapic_id(apic_id), irq, &entry,
	@@ -1522,10 +1532,12 @@ __apicdebuginit(void) print_IO_APIC(void)
	printk(KERN_DEBUG "....... : LTS : %X\n", reg_00.bits.LTS);		printk(KERN_DEBUG "....... : LTS : %X\n", reg_00.bits.LTS);

	printk(KERN_DEBUG ".... register #01: %08X\n", (int )&reg_01);		printk(KERN_DEBUG ".... register #01: %08X\n", (int )&reg_01);
	printk(KERN_DEBUG "....... : max redirection entries: %04X\n", reg_01.bits.entries);		printk(KERN_DEBUG "....... : max redirection entries: %02X\n",
			reg_01.bits.entries);

	printk(KERN_DEBUG "....... : PRQ implemented: %X\n", reg_01.bits.PRQ);		printk(KERN_DEBUG "....... : PRQ implemented: %X\n", reg_01.bits.PRQ);
	printk(KERN_DEBUG "....... : IO APIC version: %04X\n", reg_01.bits.version);		printk(KERN_DEBUG "....... : IO APIC version: %02X\n",
			reg_01.bits.version);

	/*		/*
	* Some Intel chipsets with IO APIC VERSION of 0x1? don't have reg_02,		* Some Intel chipsets with IO APIC VERSION of 0x1? don't have reg_02,
	@@ -1550,20 +1562,47 @@ __apicdebuginit(void) print_IO_APIC(void)

	printk(KERN_DEBUG ".... IRQ redirection table:\n");		printk(KERN_DEBUG ".... IRQ redirection table:\n");

			if (intr_remapping_enabled) {
			printk(KERN_DEBUG " NR Indx Fmt Mask Trig IRR"
			" Pol Stat Indx2 Zero Vect:\n");
			} else {
	printk(KERN_DEBUG " NR Dst Mask Trig IRR Pol"		printk(KERN_DEBUG " NR Dst Mask Trig IRR Pol"
	" Stat Dmod Deli Vect:\n");		" Stat Dmod Deli Vect:\n");
			}

	for (i = 0; i <= reg_01.bits.entries; i++) {		for (i = 0; i <= reg_01.bits.entries; i++) {
			if (intr_remapping_enabled) {
	struct IO_APIC_route_entry entry;		struct IO_APIC_route_entry entry;
			struct IR_IO_APIC_route_entry *ir_entry;

	entry = ioapic_read_entry(apic, i);		entry = ioapic_read_entry(apic, i);
			ir_entry = (struct IR_IO_APIC_route_entry *) &entry;
			printk(KERN_DEBUG " %02x %04X ",
			i,
			ir_entry->index
			);
			printk("%1d %1d %1d %1d %1d "
			"%1d %1d %X %02X\n",
			ir_entry->format,
			ir_entry->mask,
			ir_entry->trigger,
			ir_entry->irr,
			ir_entry->polarity,
			ir_entry->delivery_status,
			ir_entry->index2,
			ir_entry->zero,
			ir_entry->vector
			);
			} else {
			struct IO_APIC_route_entry entry;

	printk(KERN_DEBUG " %02x %03X ",		entry = ioapic_read_entry(apic, i);
			printk(KERN_DEBUG " %02x %02X ",
	i,		i,
	entry.dest		entry.dest
	);		);
			printk("%1d %1d %1d %1d %1d "
	printk("%1d %1d %1d %1d %1d %1d %1d %02X\n",		"%1d %1d %02X\n",
	entry.mask,		entry.mask,
	entry.trigger,		entry.trigger,
	entry.irr,		entry.irr,
	@@ -1575,6 +1614,8 @@ __apicdebuginit(void) print_IO_APIC(void)
	);		);
	}		}
	}		}
			}

	printk(KERN_DEBUG "IRQ to pin mappings:\n");		printk(KERN_DEBUG "IRQ to pin mappings:\n");
	for_each_active_irq(irq) {		for_each_active_irq(irq) {
	struct irq_pin_list *entry;		struct irq_pin_list *entry;
	@@ -1792,7 +1833,7 @@ __apicdebuginit(int) print_ICs(void)
	return 0;		return 0;
	}		}

	fs_initcall(print_ICs);		late_initcall(print_ICs);


	/* Where if anywhere is the i8259 connect in external int mode */		/* Where if anywhere is the i8259 connect in external int mode */