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Commit 2c17d2da authored by Stephen M. Cameron's avatar Stephen M. Cameron Committed by James Bottomley
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[SCSI] hpsa: do not read from controller unnecessarily in completion code 



MSI/MSI-X interrupts can't race the DMA completion they are communicating
so no need to read from controller to flush the DMA to the host if
MSI or MSI-X interrupts are being used.

Signed-off-by: default avatarStephen M. Cameron <scameron@beardog.cce.hp.com>
Signed-off-by: default avatarJames Bottomley <JBottomley@Parallels.com>
parent 21b8e4ef

drivers/scsi/hpsa.h

+4 −4
Original line number Diff line number Diff line
@@ -258,12 +258,12 @@ static unsigned long SA5_performant_completed(struct ctlr_info *h) 
{

	unsigned long register_value = FIFO_EMPTY;



	/* msi auto clears the interrupt pending bit. */

	if (!(h->msi_vector || h->msix_vector)) {

		/* flush the controller write of the reply queue by reading

		 * outbound doorbell status register.

		 */

		register_value = readl(h->vaddr + SA5_OUTDB_STATUS);

	/* msi auto clears the interrupt pending bit. */

	if (!(h->msi_vector || h->msix_vector)) {

		writel(SA5_OUTDB_CLEAR_PERF_BIT, h->vaddr + SA5_OUTDB_CLEAR);

		/* Do a read in order to flush the write to the controller

		 * (as per spec.)