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Commit 2b583d8b authored by Jaswinder Singh Rajput's avatar Jaswinder Singh Rajput Committed by Ingo Molnar
Browse files

x86: perf_counter remove unwanted hw_perf_enable_all 



Impact: clean, reduce kernel size a bit, avoid sparse warnings

Fixes sparse warnings:

 arch/x86/kernel/cpu/perf_counter.c:153:6: warning: symbol 'hw_perf_enable_all' was not declared. Should it be static?
 arch/x86/kernel/cpu/perf_counter.c:279:3: warning: returning void-valued expression
 arch/x86/kernel/cpu/perf_counter.c:206:3: warning: returning void-valued expression
 arch/x86/kernel/cpu/perf_counter.c:206:3: warning: returning void-valued expression

Signed-off-by: default avatarJaswinder Singh Rajput <jaswinderrajput@gmail.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 01ea1cca

arch/x86/kernel/cpu/perf_counter.c

+7 −17
Original line number Diff line number Diff line
@@ -150,14 +150,6 @@ static int __hw_perf_counter_init(struct perf_counter *counter) 
	return 0;

}



void hw_perf_enable_all(void)

{

	if (unlikely(!perf_counters_initialized))

		return;



	wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, perf_counter_mask);

}



u64 hw_perf_save_disable(void)

{

	u64 ctrl;
@@ -200,12 +192,10 @@ static inline void 
__pmc_generic_disable(struct perf_counter *counter,

			   struct hw_perf_counter *hwc, unsigned int idx)

{

	int err;



	if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL))

		return __pmc_fixed_disable(counter, hwc, idx);



	err = wrmsr_safe(hwc->config_base + idx, hwc->config, 0);

		__pmc_fixed_disable(counter, hwc, idx);

	else

		wrmsr_safe(hwc->config_base + idx, hwc->config, 0);

}



static DEFINE_PER_CPU(u64, prev_left[X86_PMC_IDX_MAX]);
@@ -276,8 +266,8 @@ __pmc_generic_enable(struct perf_counter *counter, 
			  struct hw_perf_counter *hwc, int idx)

{

	if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL))

		return __pmc_fixed_enable(counter, hwc, idx);



		__pmc_fixed_enable(counter, hwc, idx);

	else

		wrmsr(hwc->config_base + idx,

		      hwc->config | ARCH_PERFMON_EVENTSEL0_ENABLE, 0);

}