Merge branch 'next-s3c' of git://aeryn.fluff.org.uk/bjdooks/linux into devel-stable

		S3C24XX CPUfreq support

		=======================

Introduction

------------

 The S3C24XX series support a number of power saving systems, such as

 the ability to change the core, memory and peripheral operating

 frequencies. The core control is exported via the CPUFreq driver

 which has a number of different manual or automatic controls over the

 rate the core is running at.

 There are two forms of the driver depending on the specific CPU and

 how the clocks are arranged. The first implementation used as single

 PLL to feed the ARM, memory and peripherals via a series of dividers

 and muxes and this is the implementation that is documented here. A

 newer version where there is a seperate PLL and clock divider for the

 ARM core is available as a seperate driver.

Layout

------

 The code core manages the CPU specific drivers, any data that they

 need to register and the interface to the generic drivers/cpufreq

 system. Each CPU registers a driver to control the PLL, clock dividers

 and anything else associated with it. Any board that wants to use this

 framework needs to supply at least basic details of what is required.

 The core registers with drivers/cpufreq at init time if all the data

 necessary has been supplied.

CPU support

-----------

 The support for each CPU depends on the facilities provided by the

 SoC and the driver as each device has different PLL and clock chains

 associated with it.

Slow Mode

---------

 The SLOW mode where the PLL is turned off altogether and the

 system is fed by the external crystal input is currently not

 supported.

sysfs

-----

 The core code exports extra information via sysfs in the directory

 devices/system/cpu/cpu0/arch-freq.

Board Support

-------------

 Each board that wants to use the cpufreq code must register some basic

 information with the core driver to provide information about what the

 board requires and any restrictions being placed on it.

 The board needs to supply information about whether it needs the IO bank

 timings changing, any maximum frequency limits and information about the

 SDRAM refresh rate.

Document Author

---------------

Ben Dooks, Copyright 2009 Simtec Electronics

Licensed under GPLv2

config ARCH_HAS_ILOG2_U64

	bool

config ARCH_HAS_CPUFREQ

	bool

	help

	  Internal node to signify that the ARCH has CPUFREQ support

	  and that the relevant menu configurations are displayed for

	  it.

config GENERIC_HWEIGHT

	bool

	default y

config ARCH_INTEGRATOR

	bool "ARM Ltd. Integrator family"

	select ARM_AMBA

	select ARCH_HAS_CPUFREQ

	select HAVE_CLK

	select COMMON_CLKDEV

	select ICST525

	bool "PXA2xx/PXA3xx-based"

	depends on MMU

	select ARCH_MTD_XIP

	select ARCH_HAS_CPUFREQ

	select GENERIC_GPIO

	select HAVE_CLK

	select COMMON_CLKDEV

	select ISA

	select ARCH_SPARSEMEM_ENABLE

	select ARCH_MTD_XIP

	select ARCH_HAS_CPUFREQ

	select GENERIC_GPIO

	select GENERIC_TIME

	select GENERIC_CLOCKEVENTS

config ARCH_S3C2410

	bool "Samsung S3C2410, S3C2412, S3C2413, S3C2440, S3C2442, S3C2443"

	select GENERIC_GPIO

	select ARCH_HAS_CPUFREQ

	select HAVE_CLK

	help

	  Samsung S3C2410X CPU based systems, such as the Simtec Electronics

	bool "Samsung S3C64XX"

	select GENERIC_GPIO

	select HAVE_CLK

	select ARCH_HAS_CPUFREQ

	help

	  Samsung S3C64XX series based systems

config ARCH_S5PC1XX

	bool "Samsung S5PC1XX"

	select GENERIC_GPIO

	select HAVE_CLK

	select CPU_V7

	help

	  Samsung S5PC1XX series based systems

config ARCH_SHARK

	bool "Shark"

	select CPU_SA110

	select GENERIC_GPIO

	select HAVE_CLK

	select ARCH_REQUIRE_GPIOLIB

	select ARCH_HAS_CPUFREQ

	select GENERIC_TIME

	select GENERIC_CLOCKEVENTS

	help

source "arch/arm/plat-s3c24xx/Kconfig"

source "arch/arm/plat-s3c64xx/Kconfig"

source "arch/arm/plat-s3c/Kconfig"

source "arch/arm/plat-s5pc1xx/Kconfig"

if ARCH_S3C2410

source "arch/arm/mach-s3c2400/Kconfig"

source "arch/arm/plat-stmp3xxx/Kconfig"

if ARCH_S5PC1XX

source "arch/arm/mach-s5pc100/Kconfig"

endif

source "arch/arm/mach-lh7a40x/Kconfig"

source "arch/arm/mach-h720x/Kconfig"

menu "CPU Power Management"

if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_PXA || ARCH_S3C64XX)

if ARCH_HAS_CPUFREQ

source "drivers/cpufreq/Kconfig"

	bool "CPUfreq support for Samsung S3C64XX CPUs"

	depends on CPU_FREQ && CPU_S3C6410

config CPU_FREQ_S3C

	bool

	help

	  Internal configuration node for common cpufreq on Samsung SoC

config CPU_FREQ_S3C24XX

	bool "CPUfreq driver for Samsung S3C24XX series CPUs"

	depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL

	select CPU_FREQ_S3C

	help

	  This enables the CPUfreq driver for the Samsung S3C24XX family

	  of CPUs.

	  For details, take a look at <file:Documentation/cpu-freq>.

	  If in doubt, say N.

config CPU_FREQ_S3C24XX_PLL

	bool "Support CPUfreq changing of PLL frequency"

	depends on CPU_FREQ_S3C24XX && EXPERIMENTAL

	help

	  Compile in support for changing the PLL frequency from the

	  S3C24XX series CPUfreq driver. The PLL takes time to settle

	  after a frequency change, so by default it is not enabled.

	  This also means that the PLL tables for the selected CPU(s) will

	  be built which may increase the size of the kernel image.

config CPU_FREQ_S3C24XX_DEBUG

	bool "Debug CPUfreq Samsung driver core"

	depends on CPU_FREQ_S3C24XX

	help

	  Enable s3c_freq_dbg for the Samsung S3C CPUfreq core

config CPU_FREQ_S3C24XX_IODEBUG

	bool "Debug CPUfreq Samsung driver IO timing"

	depends on CPU_FREQ_S3C24XX

	help

	  Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core

config CPU_FREQ_S3C24XX_DEBUGFS

	bool "Export debugfs for CPUFreq"

	depends on CPU_FREQ_S3C24XX && DEBUG_FS

	help

	  Export status information via debugfs.

endif

source "drivers/cpuidle/Kconfig"

machine-$(CONFIG_ARCH_S3C2410)		:= s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443

machine-$(CONFIG_ARCH_S3C24A0)		:= s3c24a0

machine-$(CONFIG_ARCH_S3C64XX)		:= s3c6400 s3c6410

machine-$(CONFIG_ARCH_S5PC1XX)		:= s5pc100

machine-$(CONFIG_ARCH_SA1100)		:= sa1100

machine-$(CONFIG_ARCH_SHARK)		:= shark

machine-$(CONFIG_ARCH_STMP378X)		:= stmp378x

plat-$(CONFIG_PLAT_PXA)		:= pxa

plat-$(CONFIG_PLAT_S3C24XX)	:= s3c24xx s3c

plat-$(CONFIG_PLAT_S3C64XX)	:= s3c64xx s3c

plat-$(CONFIG_PLAT_S5PC1XX)	:= s5pc1xx s3c

plat-$(CONFIG_ARCH_STMP3XXX)	:= stmp3xxx

ifeq ($(CONFIG_ARCH_EBSA110),y)

unlock:

		spin_unlock_irqrestore(&irq_desc[i].lock, flags);

	} else if (i == NR_IRQS) {

#ifdef CONFIG_ARCH_ACORN

#ifdef CONFIG_FIQ

		show_fiq_list(p, v);

#endif

#ifdef CONFIG_SMP