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Commit 289e0827 authored by Ben Skeggs's avatar Ben Skeggs
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drm/nouveau/fifo/gk104-: identify mmu engine ids for host faults 



It appears these don't map to PBDMAs (at least on Kepler, it may or may
be valid for Fermi - this hasn't been checked), but to runlists.

This drops the NVKM_ENGINE_FIFO data from the entries too, as resetting
all of PFIFO is *not* the way to handle such faults.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent e50d0237

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c

+14 −4
Original line number Diff line number Diff line
@@ -738,12 +738,21 @@ gk104_fifo_new_(const struct gk104_fifo_func *func, struct nvkm_device *device, 
const struct nvkm_enum

gk104_fifo_fault_engine[] = {

	{ 0x00, "GR", NULL, NVKM_ENGINE_GR },

	{ 0x01, "DISPLAY" },

	{ 0x02, "CAPTURE" },

	{ 0x03, "IFB", NULL, NVKM_ENGINE_IFB },

	{ 0x04, "BAR1", NULL, NVKM_SUBDEV_BAR },

	{ 0x05, "BAR3", NULL, NVKM_SUBDEV_INSTMEM },

	{ 0x07, "PBDMA0", NULL, NVKM_ENGINE_FIFO },

	{ 0x08, "PBDMA1", NULL, NVKM_ENGINE_FIFO },

	{ 0x09, "PBDMA2", NULL, NVKM_ENGINE_FIFO },

	{ 0x05, "BAR2", NULL, NVKM_SUBDEV_INSTMEM },

	{ 0x06, "SCHED" },

	{ 0x07, "HOST0" },

	{ 0x08, "HOST1" },

	{ 0x09, "HOST2" },

	{ 0x0a, "HOST3" },

	{ 0x0b, "HOST4" },

	{ 0x0c, "HOST5" },

	{ 0x0d, "HOST6" },

	{ 0x0e, "HOST7" },

	{ 0x0f, "HOSTSR" },

	{ 0x10, "MSVLD", NULL, NVKM_ENGINE_MSVLD },

	{ 0x11, "MSPPP", NULL, NVKM_ENGINE_MSPPP },

	{ 0x13, "PERF" },
@@ -751,6 +760,7 @@ gk104_fifo_fault_engine[] = { 
	{ 0x15, "CE0", NULL, NVKM_ENGINE_CE0 },

	{ 0x16, "CE1", NULL, NVKM_ENGINE_CE1 },

	{ 0x17, "PMU" },

	{ 0x18, "PTP" },

	{ 0x19, "MSENC", NULL, NVKM_ENGINE_MSENC },

	{ 0x1b, "CE2", NULL, NVKM_ENGINE_CE2 },

	{}