Merge branch 'for_2.6.33rc_c' of git://git.pwsan.com/linux-2.6 into omap-fixes-for-linus (27dba4bc) · Commits · e / devices / android_kernel_teracube_2e

arch/arm/mach-omap1/clock_data.c

+3 −3

Original line number	Diff line number	Diff line
		@@ -599,7 +599,7 @@ static struct clk i2c_ick = {
		static struct omap_clk omap_clks[] = {
		/* non-ULPD clocks */
		CLK(NULL, "ck_ref", &ck_ref, CK_16XX \| CK_1510 \| CK_310 \| CK_7XX),
		CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX \| CK_1510 \| CK_310),
		CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX \| CK_1510 \| CK_310 \| CK_7XX),
		/* CK_GEN1 clocks */
		CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX),
		CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX),
		@@ -627,7 +627,7 @@ static struct omap_clk omap_clks[] = {
		CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX),
		CLK(NULL, "dma_ck", &dma_ck, CK_16XX \| CK_1510 \| CK_310),
		CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX),
		CLK(NULL, "api_ck", &api_ck.clk, CK_16XX \| CK_1510 \| CK_310),
		CLK(NULL, "api_ck", &api_ck.clk, CK_16XX \| CK_1510 \| CK_310 \| CK_7XX),
		CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 \| CK_310),
		CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX),
		CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX),
		@@ -678,7 +678,7 @@ static struct omap_clk omap_clks[] = {
		* init
		*/

		static struct clk_functions omap1_clk_functions __initdata = {
		static struct clk_functions omap1_clk_functions = {
		.clk_enable = omap1_clk_enable,
		.clk_disable = omap1_clk_disable,
		.clk_round_rate = omap1_clk_round_rate,

arch/arm/mach-omap2/clock2xxx.c

+48 −9

Original line number	Diff line number	Diff line
		@@ -449,40 +449,78 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
		#ifdef CONFIG_CPU_FREQ
		/*
		* Walk PRCM rate table and fillout cpufreq freq_table
		* XXX This should be replaced by an OPP layer in the near future
		*/
		static struct cpufreq_frequency_table freq_table[ARRAY_SIZE(rate_table)];
		static struct cpufreq_frequency_table *freq_table;

		void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
		{
		struct prcm_config *prcm;
		const struct prcm_config *prcm;
		long sys_ck_rate;
		int i = 0;
		int tbl_sz = 0;

		sys_ck_rate = clk_get_rate(sclk);

		for (prcm = rate_table; prcm->mpu_speed; prcm++) {
		if (!(prcm->flags & cpu_mask))
		continue;
		if (prcm->xtal_speed != sys_ck.rate)
		if (prcm->xtal_speed != sys_ck_rate)
		continue;

		/* don't put bypass rates in table */
		if (prcm->dpll_speed == prcm->xtal_speed)
		continue;

		freq_table[i].index = i;
		freq_table[i].frequency = prcm->mpu_speed / 1000;
		i++;
		tbl_sz++;
		}

		if (i == 0) {
		printk(KERN_WARNING "%s: failed to initialize frequency "
		"table\n", __func__);
		/*
		* XXX Ensure that we're doing what CPUFreq expects for this error
		* case and the following one
		*/
		if (tbl_sz == 0) {
		pr_warning("%s: no matching entries in rate_table\n",
		__func__);
		return;
		}

		/* Include the CPUFREQ_TABLE_END terminator entry */
		tbl_sz++;

		freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz,
		GFP_ATOMIC);
		if (!freq_table) {
		pr_err("%s: could not kzalloc frequency table\n", __func__);
		return;
		}

		for (prcm = rate_table; prcm->mpu_speed; prcm++) {
		if (!(prcm->flags & cpu_mask))
		continue;
		if (prcm->xtal_speed != sys_ck_rate)
		continue;

		/* don't put bypass rates in table */
		if (prcm->dpll_speed == prcm->xtal_speed)
		continue;

		freq_table[i].index = i;
		freq_table[i].frequency = prcm->mpu_speed / 1000;
		i++;
		}

		freq_table[i].index = i;
		freq_table[i].frequency = CPUFREQ_TABLE_END;

		*table = &freq_table[0];
		}

		void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
		{
		kfree(freq_table);
		}

		#endif

		struct clk_functions omap2_clk_functions = {
		@@ -494,6 +532,7 @@ struct clk_functions omap2_clk_functions = {
		.clk_disable_unused = omap2_clk_disable_unused,
		#ifdef CONFIG_CPU_FREQ
		.clk_init_cpufreq_table = omap2_clk_init_cpufreq_table,
		.clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table,
		#endif
		};

arch/arm/mach-omap2/clock34xx.c

+0 −1

Original line number	Diff line number	Diff line
		@@ -34,7 +34,6 @@
		#include <asm/div64.h>
		#include <asm/clkdev.h>

		#include <plat/sdrc.h>
		#include "clock.h"
		#include "clock34xx.h"
		#include "sdrc.h"

arch/arm/mach-omap2/clock34xx_data.c

+5 −1

Original line number	Diff line number	Diff line
		@@ -776,6 +776,8 @@ static struct clk dpll4_m5_ck = {
		.clksel_mask = OMAP3430_CLKSEL_CAM_MASK,
		.clksel = div16_dpll4_clksel,
		.clkdm_name = "dpll4_clkdm",
		.set_rate = &omap2_clksel_set_rate,
		.round_rate = &omap2_clksel_round_rate,
		.recalc = &omap2_clksel_recalc,
		};

		@@ -1500,6 +1502,7 @@ static struct clk uart2_fck = {
		.parent = &core_48m_fck,
		.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
		.enable_bit = OMAP3430_EN_UART2_SHIFT,
		.clkdm_name = "core_l4_clkdm",
		.recalc = &followparent_recalc,
		};

		@@ -1509,6 +1512,7 @@ static struct clk uart1_fck = {
		.parent = &core_48m_fck,
		.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
		.enable_bit = OMAP3430_EN_UART1_SHIFT,
		.clkdm_name = "core_l4_clkdm",
		.recalc = &followparent_recalc,
		};

		@@ -2745,7 +2749,7 @@ static struct clk mcbsp4_ick = {
		};

		static const struct clksel mcbsp_234_clksel[] = {
		{ .parent = &core_96m_fck, .rates = common_mcbsp_96m_rates },
		{ .parent = &per_96m_fck, .rates = common_mcbsp_96m_rates },
		{ .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates },
		{ .parent = NULL }
		};

arch/arm/mach-omap2/clockdomain.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -559,7 +559,7 @@ int omap2_clkdm_clk_enable(struct clockdomain clkdm, struct clk clk)
		* downstream clocks for debugging purposes?
		*/

		if (!clkdm \|\| !clk)
		if (!clkdm \|\| !clk \|\| !clkdm->clktrctrl_mask)
		return -EINVAL;

		if (atomic_inc_return(&clkdm->usecount) > 1)
		@@ -610,7 +610,7 @@ int omap2_clkdm_clk_disable(struct clockdomain clkdm, struct clk clk)
		* downstream clocks for debugging purposes?
		*/

		if (!clkdm \|\| !clk)
		if (!clkdm \|\| !clk \|\| !clkdm->clktrctrl_mask)
		return -EINVAL;

		#ifdef DEBUG