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Commit 27b46d76 authored by Simon Arlott's avatar Simon Arlott Committed by Adrian Bunk
Browse files

spelling fixes: arch/i386/ 



Spelling fixes in arch/i386/.

Signed-off-by: default avatarSimon Arlott <simon@fire.lp0.eu>
Signed-off-by: default avatarAdrian Bunk <bunk@kernel.org>
parent 5e71c605

arch/x86/boot/compressed/misc_32.c

+2 −2
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 


/*

 * Getting to provable safe in place decompression is hard.

 * Worst case behaviours need to be analized.

 * Worst case behaviours need to be analyzed.

 * Background information:

 *

 * The file layout is:
@@ -94,7 +94,7 @@ 
 * Adding 32768 instead of 32767 just makes for round numbers.

 * Adding the decompressor_size is necessary as it musht live after all

 * of the data as well.  Last I measured the decompressor is about 14K.

 * 10K of actuall data and 4K of bss.

 * 10K of actual data and 4K of bss.

 *

 */

arch/x86/kernel/acpi/boot.c

+4 −4
Original line number Diff line number Diff line
@@ -99,7 +99,7 @@ static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; 


/*

 * The default interrupt routing model is PIC (8259).  This gets

 * overriden if IOAPICs are enumerated (below).

 * overridden if IOAPICs are enumerated (below).

 */

enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC;
@@ -414,8 +414,8 @@ acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end 
 *

 * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers

 * for the 8259 PIC.  bit[n] = 1 means irq[n] is Level, otherwise Edge.

 * ECLR1 is IRQ's 0-7 (IRQ 0, 1, 2 must be 0)

 * ECLR2 is IRQ's 8-15 (IRQ 8, 13 must be 0)

 * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0)

 * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0)

 */



void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
@@ -427,7 +427,7 @@ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) 
	old = inb(0x4d0) | (inb(0x4d1) << 8);



	/*

	 * If we use ACPI to set PCI irq's, then we should clear ELCR

	 * If we use ACPI to set PCI IRQs, then we should clear ELCR

	 * since we will set it correctly as we enable the PCI irq

	 * routing.

	 */

arch/x86/kernel/apic_32.c

+2 −2
Original line number Diff line number Diff line
@@ -947,7 +947,7 @@ void __devinit setup_local_APIC(void) 
	 * Set up LVT0, LVT1:

	 *

	 * set up through-local-APIC on the BP's LINT0. This is not

	 * strictly necessery in pure symmetric-IO mode, but sometimes

	 * strictly necessary in pure symmetric-IO mode, but sometimes

	 * we delegate interrupts to the 8259A.

	 */

	/*
@@ -998,7 +998,7 @@ void __devinit setup_local_APIC(void) 
	} else {

		if (esr_disable)

			/*

			 * Something untraceble is creating bad interrupts on

			 * Something untraceable is creating bad interrupts on

			 * secondary quads ... for the moment, just leave the

			 * ESR disabled - we can't do anything useful with the

			 * errors anyway - mbligh

arch/x86/kernel/apm_32.c

+1 −1
Original line number Diff line number Diff line
@@ -57,7 +57,7 @@ 
 *         screen-blanking and gpm (Stephen Rothwell); Linux 1.99.4

 *    1.2a:Simple change to stop mysterious bug reports with SMP also added

 *	   levels to the printk calls. APM is not defined for SMP machines.

 *         The new replacment for it is, but Linux doesn't yet support this.

 *         The new replacement for it is, but Linux doesn't yet support this.

 *         Alan Cox Linux 2.1.55

 *    1.3: Set up a valid data descriptor 0x40 for buggy BIOS's

 *    1.4: Upgraded to support APM 1.2. Integrated ThinkPad suspend patch by

arch/x86/kernel/cpu/amd.c

+1 −1
Original line number Diff line number Diff line
@@ -266,7 +266,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) 
#ifdef CONFIG_X86_HT

	/*

	 * On a AMD multi core setup the lower bits of the APIC id

	 * distingush the cores.

	 * distinguish the cores.

	 */

	if (c->x86_max_cores > 1) {

		int cpu = smp_processor_id();