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Commit 26c23ee6 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

Merge branch 'omap-for-v4.6/dt-gpmc' into omap-for-v4.6/dt

parents b9d3ec1d 44e47164
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+5 −4
Original line number Original line Diff line number Diff line
@@ -236,7 +236,11 @@
	status = "okay";
	status = "okay";


	nand@0,0 {
	nand@0,0 {
		reg = <0 0 0>; /* CS0, offset 0 */
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		nand-bus-width = <8>;
		nand-bus-width = <8>;
		ti,nand-ecc-opt = "bch8";
		ti,nand-ecc-opt = "bch8";
		ti,nand-xfer-type = "polled";
		ti,nand-xfer-type = "polled";
@@ -257,12 +261,9 @@
		gpmc,access-ns = <64>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wait-on-read = "true";
		gpmc,wait-on-write = "true";
		gpmc,bus-turnaround-ns = <0>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wait-monitoring-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		gpmc,wr-data-mux-bus-ns = <0>;


+5 −3
Original line number Original line Diff line number Diff line
@@ -7,6 +7,7 @@
 * published by the Free Software Foundation.
 * published by the Free Software Foundation.
 */
 */
#include "am33xx.dtsi"
#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>


/ {
/ {
	model = "Grinn AM335x ChiliSOM";
	model = "Grinn AM335x ChiliSOM";
@@ -218,7 +219,11 @@
	pinctrl-0 = <&nandflash_pins>;
	pinctrl-0 = <&nandflash_pins>;
	ranges = <0 0 0x08000000 0x01000000>; /* CS0 0 @addr 0x08000000, size 0x01000000 */
	ranges = <0 0 0x08000000 0x01000000>; /* CS0 0 @addr 0x08000000, size 0x01000000 */
	nand@0,0 {
	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>;	/* CS0, offset 0, IO size 4 */
		reg = <0 0 4>;	/* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		ti,nand-ecc-opt = "bch8";
		ti,nand-ecc-opt = "bch8";
		ti,elm-id = <&elm>;
		ti,elm-id = <&elm>;
		nand-bus-width = <8>;
		nand-bus-width = <8>;
@@ -237,12 +242,9 @@
		gpmc,access-ns = <64>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wait-on-read = "true";
		gpmc,wait-on-write = "true";
		gpmc,bus-turnaround-ns = <0>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wait-monitoring-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		gpmc,wr-data-mux-bus-ns = <0>;
	};
	};
+5 −4
Original line number Original line Diff line number Diff line
@@ -406,7 +406,11 @@ status = "okay";
	pinctrl-0 = <&nandflash_pins>;
	pinctrl-0 = <&nandflash_pins>;
	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
	nand@0,0 {
	nand@0,0 {
		reg = <0 0 0>; /* CS0, offset 0 */
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		ti,nand-ecc-opt = "bch8";
		ti,nand-ecc-opt = "bch8";
		ti,elm-id = <&elm>;
		ti,elm-id = <&elm>;
		nand-bus-width = <8>;
		nand-bus-width = <8>;
@@ -425,12 +429,9 @@ status = "okay";
		gpmc,access-ns = <64>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wait-on-read = "true";
		gpmc,wait-on-write = "true";
		gpmc,bus-turnaround-ns = <0>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wait-monitoring-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		gpmc,wr-data-mux-bus-ns = <0>;
		/* MTD partition table */
		/* MTD partition table */
+4 −3
Original line number Original line Diff line number Diff line
@@ -519,7 +519,11 @@
	pinctrl-0 = <&nandflash_pins_s0>;
	pinctrl-0 = <&nandflash_pins_s0>;
	ranges = <0 0 0x08000000 0x1000000>;	/* CS0: 16MB for NAND */
	ranges = <0 0 0x08000000 0x1000000>;	/* CS0: 16MB for NAND */
	nand@0,0 {
	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		ti,nand-ecc-opt = "bch8";
		ti,nand-ecc-opt = "bch8";
		ti,elm-id = <&elm>;
		ti,elm-id = <&elm>;
		nand-bus-width = <8>;
		nand-bus-width = <8>;
@@ -538,12 +542,9 @@
		gpmc,access-ns = <64>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wait-on-read = "true";
		gpmc,wait-on-write = "true";
		gpmc,bus-turnaround-ns = <0>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wait-monitoring-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		gpmc,wr-data-mux-bus-ns = <0>;
		/* MTD partition table */
		/* MTD partition table */
+5 −3
Original line number Original line Diff line number Diff line
@@ -11,6 +11,7 @@
/dts-v1/;
/dts-v1/;


#include "am33xx.dtsi"
#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>


/ {
/ {
	cpus {
	cpus {
@@ -129,7 +130,11 @@
	ranges = <0 0 0x08000000 0x1000000>;	/* CS0: 16MB for NAND */
	ranges = <0 0 0x08000000 0x1000000>;	/* CS0: 16MB for NAND */


	nand@0,0 {
	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		nand-bus-width = <8>;
		nand-bus-width = <8>;
		ti,nand-ecc-opt = "bch8";
		ti,nand-ecc-opt = "bch8";
		gpmc,device-width = <1>;
		gpmc,device-width = <1>;
@@ -147,12 +152,9 @@
		gpmc,access-ns = <64>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wait-on-read = "true";
		gpmc,wait-on-write = "true";
		gpmc,bus-turnaround-ns = <0>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wait-monitoring-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		gpmc,wr-data-mux-bus-ns = <0>;


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