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Commit 262ca2b0 authored by Matt Roper's avatar Matt Roper Committed by Daniel Vetter
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drm/i915: Rename similar plane functions to avoid confusion 



The name 'update_plane' was used both for the primary plane functions in
intel_display.c and the sprite/overlay functions in intel_sprite.c.
Rename the primary plane functions to 'update_primary_plane' to avoid
confusion.

On a similar note, intel_display.c already had a function called
intel_disable_primary_plane() that programs the hardware to disable a
pipe's primary plane.  When we hook up primary planes through the DRM
plane interface, one of the natural handler names will be
intel_primary_plane_disable(), which is very similar.  To avoid
confusion, rename the existing intel_disable_primary_plane() to
intel_disable_primary_hw_plane() to make the two names a little more
distinct.

Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
[danvet: Fix up conflicts.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 11ea8b7d

drivers/gpu/drm/i915/i915_drv.h

+3 −2
Original line number Original line Diff line number Diff line
@@ -462,7 +462,8 @@ struct drm_i915_display_funcs { 
			  struct drm_framebuffer *fb,

			  struct drm_framebuffer *fb,

			  struct drm_i915_gem_object *obj,

			  struct drm_i915_gem_object *obj,

			  uint32_t flags);

			  uint32_t flags);

	int (*update_plane)(struct drm_crtc *crtc, struct drm_framebuffer *fb,

	int (*update_primary_plane)(struct drm_crtc *crtc,

				    struct drm_framebuffer *fb,

				    int x, int y);

				    int x, int y);

	void (*hpd_irq_setup)(struct drm_device *dev);

	void (*hpd_irq_setup)(struct drm_device *dev);

	/* clock updates for mode set */

	/* clock updates for mode set */

drivers/gpu/drm/i915/intel_display.c

+33 −25
Original line number Original line Diff line number Diff line
@@ -1872,14 +1872,14 @@ void intel_flush_primary_plane(struct drm_i915_private *dev_priv, 
}

}





/**

/**

 * intel_enable_primary_plane - enable the primary plane on a given pipe

 * intel_enable_primary_hw_plane - enable the primary plane on a given pipe

 * @dev_priv: i915 private structure

 * @dev_priv: i915 private structure

 * @plane: plane to enable

 * @plane: plane to enable

 * @pipe: pipe being fed

 * @pipe: pipe being fed

 *

 *

 * Enable @plane on @pipe, making sure that @pipe is running first.

 * Enable @plane on @pipe, making sure that @pipe is running first.

 */

 */

static void intel_enable_primary_plane(struct drm_i915_private *dev_priv,

static void intel_enable_primary_hw_plane(struct drm_i915_private *dev_priv,

					  enum plane plane, enum pipe pipe)

					  enum plane plane, enum pipe pipe)

{

{

	struct intel_crtc *intel_crtc =

	struct intel_crtc *intel_crtc =
@@ -1905,14 +1905,14 @@ static void intel_enable_primary_plane(struct drm_i915_private *dev_priv, 
}

}





/**

/**

 * intel_disable_primary_plane - disable the primary plane

 * intel_disable_primary_hw_plane - disable the primary hardware plane

 * @dev_priv: i915 private structure

 * @dev_priv: i915 private structure

 * @plane: plane to disable

 * @plane: plane to disable

 * @pipe: pipe consuming the data

 * @pipe: pipe consuming the data

 *

 *

 * Disable @plane; should be an independent operation.

 * Disable @plane; should be an independent operation.

 */

 */

static void intel_disable_primary_plane(struct drm_i915_private *dev_priv,

static void intel_disable_primary_hw_plane(struct drm_i915_private *dev_priv,

					   enum plane plane, enum pipe pipe)

					   enum plane plane, enum pipe pipe)

{

{

	struct intel_crtc *intel_crtc =

	struct intel_crtc *intel_crtc =
@@ -2152,7 +2152,8 @@ static void intel_find_plane_obj(struct intel_crtc *intel_crtc, 
	}

	}

}

}





static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,

static int i9xx_update_primary_plane(struct drm_crtc *crtc,

				     struct drm_framebuffer *fb,

				     int x, int y)

				     int x, int y)

{

{

	struct drm_device *dev = crtc->dev;

	struct drm_device *dev = crtc->dev;
@@ -2252,8 +2253,9 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb, 
	return 0;

	return 0;

}

}





static int ironlake_update_plane(struct drm_crtc *crtc,

static int ironlake_update_primary_plane(struct drm_crtc *crtc,

				 struct drm_framebuffer *fb, int x, int y)

					 struct drm_framebuffer *fb,

					 int x, int y)

{

{

	struct drm_device *dev = crtc->dev;

	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -2357,7 +2359,7 @@ intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb, 
		dev_priv->display.disable_fbc(dev);

		dev_priv->display.disable_fbc(dev);

	intel_increase_pllclock(crtc);

	intel_increase_pllclock(crtc);





	return dev_priv->display.update_plane(crtc, fb, x, y);

	return dev_priv->display.update_primary_plane(crtc, fb, x, y);

}

}





void intel_display_handle_reset(struct drm_device *dev)

void intel_display_handle_reset(struct drm_device *dev)
@@ -2397,8 +2399,10 @@ void intel_display_handle_reset(struct drm_device *dev) 
		 * a NULL crtc->fb.

		 * a NULL crtc->fb.

		 */

		 */

		if (intel_crtc->active && crtc->fb)

		if (intel_crtc->active && crtc->fb)

			dev_priv->display.update_plane(crtc, crtc->fb,

			dev_priv->display.update_primary_plane(crtc,

						       crtc->x, crtc->y);

							       crtc->fb,

							       crtc->x,

							       crtc->y);

		mutex_unlock(&crtc->mutex);

		mutex_unlock(&crtc->mutex);

	}

	}

}

}
@@ -2514,7 +2518,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, 
		intel_crtc->config.pipe_src_h = adjusted_mode->crtc_vdisplay;

		intel_crtc->config.pipe_src_h = adjusted_mode->crtc_vdisplay;

	}

	}





	ret = dev_priv->display.update_plane(crtc, fb, x, y);

	ret = dev_priv->display.update_primary_plane(crtc, fb, x, y);

	if (ret) {

	if (ret) {

		mutex_lock(&dev->struct_mutex);

		mutex_lock(&dev->struct_mutex);

		intel_unpin_fb_obj(to_intel_framebuffer(fb)->obj);

		intel_unpin_fb_obj(to_intel_framebuffer(fb)->obj);
@@ -3695,7 +3699,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) 




	intel_update_watermarks(crtc);

	intel_update_watermarks(crtc);

	intel_enable_pipe(intel_crtc);

	intel_enable_pipe(intel_crtc);

	intel_enable_primary_plane(dev_priv, plane, pipe);

	intel_enable_primary_hw_plane(dev_priv, plane, pipe);

	intel_enable_planes(crtc);

	intel_enable_planes(crtc);

	intel_crtc_update_cursor(crtc, true);

	intel_crtc_update_cursor(crtc, true);
@@ -3737,7 +3741,7 @@ static void haswell_crtc_enable_planes(struct drm_crtc *crtc) 
	int pipe = intel_crtc->pipe;

	int pipe = intel_crtc->pipe;

	int plane = intel_crtc->plane;

	int plane = intel_crtc->plane;





	intel_enable_primary_plane(dev_priv, plane, pipe);

	intel_enable_primary_hw_plane(dev_priv, plane, pipe);

	intel_enable_planes(crtc);

	intel_enable_planes(crtc);

	intel_crtc_update_cursor(crtc, true);

	intel_crtc_update_cursor(crtc, true);
@@ -3767,7 +3771,7 @@ static void haswell_crtc_disable_planes(struct drm_crtc *crtc) 




	intel_crtc_update_cursor(crtc, false);

	intel_crtc_update_cursor(crtc, false);

	intel_disable_planes(crtc);

	intel_disable_planes(crtc);

	intel_disable_primary_plane(dev_priv, plane, pipe);

	intel_disable_primary_hw_plane(dev_priv, plane, pipe);

}

}





/*

/*
@@ -3895,7 +3899,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) 




	intel_crtc_update_cursor(crtc, false);

	intel_crtc_update_cursor(crtc, false);

	intel_disable_planes(crtc);

	intel_disable_planes(crtc);

	intel_disable_primary_plane(dev_priv, plane, pipe);

	intel_disable_primary_hw_plane(dev_priv, plane, pipe);





	if (intel_crtc->config.has_pch_encoder)

	if (intel_crtc->config.has_pch_encoder)

		intel_set_pch_fifo_underrun_reporting(dev, pipe, false);

		intel_set_pch_fifo_underrun_reporting(dev, pipe, false);
@@ -4378,7 +4382,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) 
	intel_update_watermarks(crtc);

	intel_update_watermarks(crtc);

	intel_enable_pipe(intel_crtc);

	intel_enable_pipe(intel_crtc);

	intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);

	intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);

	intel_enable_primary_plane(dev_priv, plane, pipe);

	intel_enable_primary_hw_plane(dev_priv, plane, pipe);

	intel_enable_planes(crtc);

	intel_enable_planes(crtc);

	intel_crtc_update_cursor(crtc, true);

	intel_crtc_update_cursor(crtc, true);
@@ -4417,7 +4421,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) 
	intel_update_watermarks(crtc);

	intel_update_watermarks(crtc);

	intel_enable_pipe(intel_crtc);

	intel_enable_pipe(intel_crtc);

	intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);

	intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);

	intel_enable_primary_plane(dev_priv, plane, pipe);

	intel_enable_primary_hw_plane(dev_priv, plane, pipe);

	intel_enable_planes(crtc);

	intel_enable_planes(crtc);

	/* The fixup needs to happen before cursor is enabled */

	/* The fixup needs to happen before cursor is enabled */

	if (IS_G4X(dev))

	if (IS_G4X(dev))
@@ -4473,7 +4477,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc) 
	intel_crtc_dpms_overlay(intel_crtc, false);

	intel_crtc_dpms_overlay(intel_crtc, false);

	intel_crtc_update_cursor(crtc, false);

	intel_crtc_update_cursor(crtc, false);

	intel_disable_planes(crtc);

	intel_disable_planes(crtc);

	intel_disable_primary_plane(dev_priv, plane, pipe);

	intel_disable_primary_hw_plane(dev_priv, plane, pipe);





	intel_set_cpu_fifo_underrun_reporting(dev, pipe, false);

	intel_set_cpu_fifo_underrun_reporting(dev, pipe, false);

	intel_disable_pipe(dev_priv, pipe);

	intel_disable_pipe(dev_priv, pipe);
@@ -11018,7 +11022,8 @@ static void intel_init_display(struct drm_device *dev) 
		dev_priv->display.crtc_enable = haswell_crtc_enable;

		dev_priv->display.crtc_enable = haswell_crtc_enable;

		dev_priv->display.crtc_disable = haswell_crtc_disable;

		dev_priv->display.crtc_disable = haswell_crtc_disable;

		dev_priv->display.off = haswell_crtc_off;

		dev_priv->display.off = haswell_crtc_off;

		dev_priv->display.update_plane = ironlake_update_plane;

		dev_priv->display.update_primary_plane =

			ironlake_update_primary_plane;

	} else if (HAS_PCH_SPLIT(dev)) {

	} else if (HAS_PCH_SPLIT(dev)) {

		dev_priv->display.get_pipe_config = ironlake_get_pipe_config;

		dev_priv->display.get_pipe_config = ironlake_get_pipe_config;

		dev_priv->display.get_plane_config = ironlake_get_plane_config;

		dev_priv->display.get_plane_config = ironlake_get_plane_config;
@@ -11026,7 +11031,8 @@ static void intel_init_display(struct drm_device *dev) 
		dev_priv->display.crtc_enable = ironlake_crtc_enable;

		dev_priv->display.crtc_enable = ironlake_crtc_enable;

		dev_priv->display.crtc_disable = ironlake_crtc_disable;

		dev_priv->display.crtc_disable = ironlake_crtc_disable;

		dev_priv->display.off = ironlake_crtc_off;

		dev_priv->display.off = ironlake_crtc_off;

		dev_priv->display.update_plane = ironlake_update_plane;

		dev_priv->display.update_primary_plane =

			ironlake_update_primary_plane;

	} else if (IS_VALLEYVIEW(dev)) {

	} else if (IS_VALLEYVIEW(dev)) {

		dev_priv->display.get_pipe_config = i9xx_get_pipe_config;

		dev_priv->display.get_pipe_config = i9xx_get_pipe_config;

		dev_priv->display.get_plane_config = i9xx_get_plane_config;

		dev_priv->display.get_plane_config = i9xx_get_plane_config;
@@ -11034,7 +11040,8 @@ static void intel_init_display(struct drm_device *dev) 
		dev_priv->display.crtc_enable = valleyview_crtc_enable;

		dev_priv->display.crtc_enable = valleyview_crtc_enable;

		dev_priv->display.crtc_disable = i9xx_crtc_disable;

		dev_priv->display.crtc_disable = i9xx_crtc_disable;

		dev_priv->display.off = i9xx_crtc_off;

		dev_priv->display.off = i9xx_crtc_off;

		dev_priv->display.update_plane = i9xx_update_plane;

		dev_priv->display.update_primary_plane =

			i9xx_update_primary_plane;

	} else {

	} else {

		dev_priv->display.get_pipe_config = i9xx_get_pipe_config;

		dev_priv->display.get_pipe_config = i9xx_get_pipe_config;

		dev_priv->display.get_plane_config = i9xx_get_plane_config;

		dev_priv->display.get_plane_config = i9xx_get_plane_config;
@@ -11042,7 +11049,8 @@ static void intel_init_display(struct drm_device *dev) 
		dev_priv->display.crtc_enable = i9xx_crtc_enable;

		dev_priv->display.crtc_enable = i9xx_crtc_enable;

		dev_priv->display.crtc_disable = i9xx_crtc_disable;

		dev_priv->display.crtc_disable = i9xx_crtc_disable;

		dev_priv->display.off = i9xx_crtc_off;

		dev_priv->display.off = i9xx_crtc_off;

		dev_priv->display.update_plane = i9xx_update_plane;

		dev_priv->display.update_primary_plane =

			i9xx_update_primary_plane;

	}

	}





	/* Returns the core display clock speed */

	/* Returns the core display clock speed */