Merge branch 'for-next' into for-linus

ADI AXI-I2S controller

Required properties:

 - compatible : Must be "adi,axi-i2s-1.00.a"

 - reg : Must contain I2S core's registers location and length

 - clocks : Pairs of phandle and specifier referencing the controller's clocks.

   The controller expects two clocks, the clock used for the AXI interface and

   the clock used as the sampling rate reference clock sample.

 - clock-names : "axi" for the clock to the AXI interface, "ref" for the sample

   rate reference clock.

 - dmas: Pairs of phandle and specifier for the DMA channels that are used by

   the core. The core expects two dma channels, one for transmit and one for

   receive.

 - dma-names : "tx" for the transmit channel, "rx" for the receive channel.

For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties

please check:

	* resource-names.txt

	* clock/clock-bindings.txt

	* dma/dma.txt

Example:

	i2s: i2s@0x77600000 {

		compatible = "adi,axi-i2s-1.00.a";

		reg = <0x77600000 0x1000>;

		clocks = <&clk 15>, <&audio_clock>;

		clock-names = "axi", "ref";

		dmas = <&ps7_dma 0>, <&ps7_dma 1>;

		dma-names = "tx", "rx";

	};

ADI AXI-SPDIF controller

Required properties:

 - compatible : Must be "adi,axi-spdif-1.00.a"

 - reg : Must contain SPDIF core's registers location and length

 - clocks : Pairs of phandle and specifier referencing the controller's clocks.

   The controller expects two clocks, the clock used for the AXI interface and

   the clock used as the sampling rate reference clock sample.

 - clock-names: "axi" for the clock to the AXI interface, "ref" for the sample

   rate reference clock.

 - dmas: Pairs of phandle and specifier for the DMA channel that is used by

   the core. The core expects one dma channel for transmit.

 - dma-names : Must be "tx"

For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties

please check:

	* resource-names.txt

	* clock/clock-bindings.txt

	* dma/dma.txt

Example:

	spdif: spdif@0x77400000 {

		compatible = "adi,axi-spdif-tx-1.00.a";

		reg = <0x77600000 0x1000>;

		clocks = <&clk 15>, <&audio_clock>;

		clock-names = "axi", "ref";

		dmas = <&ps7_dma 0>;

		dma-names = "tx";

	};

* Broadcom BCM2835 SoC I2S/PCM module

Required properties:

- compatible: "brcm,bcm2835-i2s"

- reg: A list of base address and size entries:

	* The first entry should cover the PCM registers

	* The second entry should cover the PCM clock registers

- dmas: List of DMA controller phandle and DMA request line ordered pairs.

- dma-names: Identifier string for each DMA request line in the dmas property.

  These strings correspond 1:1 with the ordered pairs in dmas.

  One of the DMA channels will be responsible for transmission (should be

  named "tx") and one for reception (should be named "rx").

Example:

bcm2835_i2s: i2s@7e203000 {

	compatible = "brcm,bcm2835-i2s";

	reg = <0x7e203000 0x20>,

	      <0x7e101098 0x02>;

	dmas = <&dma 2>,

	       <&dma 3>;

	dma-names = "tx", "rx";

};

CS42L52 audio CODEC

Required properties:

  - compatible : "cirrus,cs42l52"

  - reg : the I2C address of the device for I2C

Optional properties:

  - cirrus,reset-gpio : GPIO controller's phandle and the number

  of the GPIO used to reset the codec.

  - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.

  Allowable values of 0x00 through 0x0F. These are raw values written to the

  register, not the actual frequency. The frequency is determined by the following.

  Frequency = (64xFs)/(N+2)

  N = chgfreq_val

  Fs = Sample Rate (variable)

  - cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured

  as a differential input. If not present then the MICA input is configured as

  Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.

  - cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured

  as a differential input. If not present then the MICB input is configured as

  Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.

  - cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin

  0 = 0.5 x VA

  1 = 0.6 x VA

  2 = 0.7 x VA

  3 = 0.8 x VA

  4 = 0.83 x VA

  5 = 0.91 x VA

Example:

codec: codec@4a {

	compatible = "cirrus,cs42l52";

	reg = <0x4a>;

	reset-gpio = <&gpio 10 0>;

	cirrus,chgfreq-divisor = <0x05>;

	cirrus.mica-differential-cfg;

	cirrus,micbias-lvl = <5>;

};

- compatible :

	"ti,dm646x-mcasp-audio"	: for DM646x platforms

	"ti,da830-mcasp-audio"	: for both DA830 & DA850 platforms

	"ti,am33xx-mcasp-audio"	: for AM33xx platforms (AM33xx, TI81xx)

	"ti,am33xx-mcasp-audio"	: for AM33xx platforms (AM33xx, AM43xx, TI81xx)

	"ti,dra7-mcasp-audio"	: for DRA7xx platforms

- reg : Should contain reg specifiers for the entries in the reg-names property.

- reg-names : Should contain:

- pinctrl-0: Should specify pin control group used for this controller.

- pinctrl-names: Should contain only one value - "default", for more details

  		 please refer to pinctrl-bindings.txt

- fck_parent : Should contain a valid clock name which will be used as parent

	       for the McASP fck

Example: