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Commit 24a07a12 authored by Roy Huang's avatar Roy Huang Committed by Bryan Wu
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Blackfin arch: initial supporting for BF548-EZKIT



The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia
applications where system performance and cost are essential ingredients. The
integration of multimedia, human interface, and connectivity peripherals combined
with increased system bandwidth and on-chip memory provides customers a platform to
design the most demanding applications.

Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers
such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will
be submitted later.

Please enjoy the show.

Signed-off-by: default avatarRoy Huang <roy.huang@analog.com>
Signed-off-by: default avatarBryan Wu <bryan.wu@analog.com>
parent 088eec11
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+45 −2
Original line number Original line Diff line number Diff line
@@ -71,6 +71,7 @@ config GENERIC_CALIBRATE_DELAY


config IRQCHIP_DEMUX_GPIO
config IRQCHIP_DEMUX_GPIO
	bool
	bool
	depends on (BF53x || BF561)
	default y
	default y


source "init/Kconfig"
source "init/Kconfig"
@@ -114,6 +115,26 @@ config BF537
	help
	help
	  BF537 Processor Support.
	  BF537 Processor Support.


config BF542
	bool "BF542"
	help
	  BF542 Processor Support.

config BF544
	bool "BF544"
	help
	  BF544 Processor Support.

config BF548
	bool "BF548"
	help
	  BF548 Processor Support.

config BF549
	bool "BF549"
	help
	  BF549 Processor Support.

config BF561
config BF561
	bool "BF561"
	bool "BF561"
	help
	help
@@ -125,6 +146,11 @@ choice
	prompt "Silicon Rev"
	prompt "Silicon Rev"
	default BF_REV_0_2 if BF537
	default BF_REV_0_2 if BF537
	default BF_REV_0_3 if BF533
	default BF_REV_0_3 if BF533
	default BF_REV_0_0 if BF549

config BF_REV_0_0
	bool "0.0"
	depends on (BF549)


config BF_REV_0_2
config BF_REV_0_2
	bool "0.2"
	bool "0.2"
@@ -150,6 +176,16 @@ config BF_REV_NONE


endchoice
endchoice


config BF53x
	bool
	depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
	default y

config BF54x
	bool
	depends on (BF542 || BF544 || BF548 || BF549)
	default y

config BFIN_DUAL_CORE
config BFIN_DUAL_CORE
	bool
	bool
	depends on (BF561)
	depends on (BF561)
@@ -198,6 +234,12 @@ config BFIN537_BLUETECHNIX_CM
	help
	help
	  CM-BF537 support for EVAL- and DEV-Board.
	  CM-BF537 support for EVAL- and DEV-Board.


config BFIN548_EZKIT
	bool "BF548-EZKIT"
	depends on (BF548 || BF549)
	  help
	  BFIN548-EZKIT board Support.

config BFIN561_BLUETECHNIX_CM
config BFIN561_BLUETECHNIX_CM
	bool "Bluetechnix CM-BF561"
	bool "Bluetechnix CM-BF561"
	depends on (BF561)
	depends on (BF561)
@@ -265,6 +307,7 @@ config BFIN_SHARED_FLASH_ENET
source "arch/blackfin/mach-bf533/Kconfig"
source "arch/blackfin/mach-bf533/Kconfig"
source "arch/blackfin/mach-bf561/Kconfig"
source "arch/blackfin/mach-bf561/Kconfig"
source "arch/blackfin/mach-bf537/Kconfig"
source "arch/blackfin/mach-bf537/Kconfig"
source "arch/blackfin/mach-bf548/Kconfig"


menu "Board customizations"
menu "Board customizations"


@@ -543,7 +586,7 @@ source "mm/Kconfig"


config BFIN_DMA_5XX
config BFIN_DMA_5XX
	bool "Enable DMA Support"
	bool "Enable DMA Support"
	depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561)
	depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561 || BF54x)
	default y
	default y
	help
	help
	  DMA driver for BF5xx.
	  DMA driver for BF5xx.
@@ -839,7 +882,7 @@ endchoice


endmenu
endmenu


if (BF537 || BF533)
if (BF537 || BF533 || BF54x)


menu "CPU Frequency scaling"
menu "CPU Frequency scaling"


+2 −0
Original line number Original line Diff line number Diff line
@@ -24,6 +24,8 @@ machine-$(CONFIG_BF533) := bf533
machine-$(CONFIG_BF534) := bf537
machine-$(CONFIG_BF534) := bf537
machine-$(CONFIG_BF536) := bf537
machine-$(CONFIG_BF536) := bf537
machine-$(CONFIG_BF537) := bf537
machine-$(CONFIG_BF537) := bf537
machine-$(CONFIG_BF548) := bf548
machine-$(CONFIG_BF549) := bf548
machine-$(CONFIG_BF561) := bf561
machine-$(CONFIG_BF561) := bf561
MACHINE := $(machine-y)
MACHINE := $(machine-y)
export MACHINE
export MACHINE
+3 −2
Original line number Original line Diff line number Diff line
@@ -6,9 +6,10 @@ extra-y := init_task.o vmlinux.lds


obj-y := \
obj-y := \
	entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
	entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
	sys_bfin.o time.o traps.o irqchip.o dma-mapping.o bfin_gpio.o \
	sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o
	flat.o


obj-$(CONFIG_BF53x)		     += bfin_gpio.o
obj-$(CONFIG_BF561)		     += bfin_gpio.o
obj-$(CONFIG_MODULES)                += module.o
obj-$(CONFIG_MODULES)                += module.o
obj-$(CONFIG_BFIN_DMA_5XX)           += bfin_dma_5xx.o
obj-$(CONFIG_BFIN_DMA_5XX)           += bfin_dma_5xx.o
obj-$(CONFIG_DUAL_CORE_TEST_MODULE)  += dualcore_test.o
obj-$(CONFIG_DUAL_CORE_TEST_MODULE)  += dualcore_test.o
+1 −204
Original line number Original line Diff line number Diff line
@@ -34,6 +34,7 @@
#include <linux/kernel.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/param.h>


#include <asm/blackfin.h>
#include <asm/dma.h>
#include <asm/dma.h>
#include <asm/cacheflush.h>
#include <asm/cacheflush.h>


@@ -45,67 +46,6 @@
***************************************************************************/
***************************************************************************/


static struct dma_channel dma_ch[MAX_BLACKFIN_DMA_CHANNEL];
static struct dma_channel dma_ch[MAX_BLACKFIN_DMA_CHANNEL];
#if defined (CONFIG_BF561)
static struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
	(struct dma_register *) DMA1_0_NEXT_DESC_PTR,
	(struct dma_register *) DMA1_1_NEXT_DESC_PTR,
	(struct dma_register *) DMA1_2_NEXT_DESC_PTR,
	(struct dma_register *) DMA1_3_NEXT_DESC_PTR,
	(struct dma_register *) DMA1_4_NEXT_DESC_PTR,
	(struct dma_register *) DMA1_5_NEXT_DESC_PTR,
	(struct dma_register *) DMA1_6_NEXT_DESC_PTR,
	(struct dma_register *) DMA1_7_NEXT_DESC_PTR,
	(struct dma_register *) DMA1_8_NEXT_DESC_PTR,
	(struct dma_register *) DMA1_9_NEXT_DESC_PTR,
	(struct dma_register *) DMA1_10_NEXT_DESC_PTR,
	(struct dma_register *) DMA1_11_NEXT_DESC_PTR,
	(struct dma_register *) DMA2_0_NEXT_DESC_PTR,
	(struct dma_register *) DMA2_1_NEXT_DESC_PTR,
	(struct dma_register *) DMA2_2_NEXT_DESC_PTR,
	(struct dma_register *) DMA2_3_NEXT_DESC_PTR,
	(struct dma_register *) DMA2_4_NEXT_DESC_PTR,
	(struct dma_register *) DMA2_5_NEXT_DESC_PTR,
	(struct dma_register *) DMA2_6_NEXT_DESC_PTR,
	(struct dma_register *) DMA2_7_NEXT_DESC_PTR,
	(struct dma_register *) DMA2_8_NEXT_DESC_PTR,
	(struct dma_register *) DMA2_9_NEXT_DESC_PTR,
	(struct dma_register *) DMA2_10_NEXT_DESC_PTR,
	(struct dma_register *) DMA2_11_NEXT_DESC_PTR,
	(struct dma_register *) MDMA1_D0_NEXT_DESC_PTR,
	(struct dma_register *) MDMA1_S0_NEXT_DESC_PTR,
	(struct dma_register *) MDMA1_D1_NEXT_DESC_PTR,
	(struct dma_register *) MDMA1_S1_NEXT_DESC_PTR,
	(struct dma_register *) MDMA2_D0_NEXT_DESC_PTR,
	(struct dma_register *) MDMA2_S0_NEXT_DESC_PTR,
	(struct dma_register *) MDMA2_D1_NEXT_DESC_PTR,
	(struct dma_register *) MDMA2_S1_NEXT_DESC_PTR,
	(struct dma_register *) IMDMA_D0_NEXT_DESC_PTR,
	(struct dma_register *) IMDMA_S0_NEXT_DESC_PTR,
	(struct dma_register *) IMDMA_D1_NEXT_DESC_PTR,
	(struct dma_register *) IMDMA_S1_NEXT_DESC_PTR,
};
#else
static struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
	(struct dma_register *) DMA0_NEXT_DESC_PTR,
	(struct dma_register *) DMA1_NEXT_DESC_PTR,
	(struct dma_register *) DMA2_NEXT_DESC_PTR,
	(struct dma_register *) DMA3_NEXT_DESC_PTR,
	(struct dma_register *) DMA4_NEXT_DESC_PTR,
	(struct dma_register *) DMA5_NEXT_DESC_PTR,
	(struct dma_register *) DMA6_NEXT_DESC_PTR,
	(struct dma_register *) DMA7_NEXT_DESC_PTR,
#if (defined(CONFIG_BF537) || defined(CONFIG_BF534) || defined(CONFIG_BF536))
	(struct dma_register *) DMA8_NEXT_DESC_PTR,
	(struct dma_register *) DMA9_NEXT_DESC_PTR,
	(struct dma_register *) DMA10_NEXT_DESC_PTR,
	(struct dma_register *) DMA11_NEXT_DESC_PTR,
#endif
	(struct dma_register *) MDMA_D0_NEXT_DESC_PTR,
	(struct dma_register *) MDMA_S0_NEXT_DESC_PTR,
	(struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
	(struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
};
#endif


/*------------------------------------------------------------------------------
/*------------------------------------------------------------------------------
 *       Set the Buffer Clear bit in the Configuration register of specific DMA
 *       Set the Buffer Clear bit in the Configuration register of specific DMA
@@ -138,149 +78,6 @@ static int __init blackfin_dma_init(void)


arch_initcall(blackfin_dma_init);
arch_initcall(blackfin_dma_init);


/*
 *	Form the channel find the irq number for that channel.
 */
#if !defined(CONFIG_BF561)

static int bf533_channel2irq(unsigned int channel)
{
	int ret_irq = -1;

	switch (channel) {
	case CH_PPI:
		ret_irq = IRQ_PPI;
		break;

#if (defined(CONFIG_BF537) || defined(CONFIG_BF534) || defined(CONFIG_BF536))
	case CH_EMAC_RX:
		ret_irq = IRQ_MAC_RX;
		break;

	case CH_EMAC_TX:
		ret_irq = IRQ_MAC_TX;
		break;

	case CH_UART1_RX:
		ret_irq = IRQ_UART1_RX;
		break;

	case CH_UART1_TX:
		ret_irq = IRQ_UART1_TX;
		break;
#endif

	case CH_SPORT0_RX:
		ret_irq = IRQ_SPORT0_RX;
		break;

	case CH_SPORT0_TX:
		ret_irq = IRQ_SPORT0_TX;
		break;

	case CH_SPORT1_RX:
		ret_irq = IRQ_SPORT1_RX;
		break;

	case CH_SPORT1_TX:
		ret_irq = IRQ_SPORT1_TX;
		break;

	case CH_SPI:
		ret_irq = IRQ_SPI;
		break;

	case CH_UART_RX:
		ret_irq = IRQ_UART_RX;
		break;

	case CH_UART_TX:
		ret_irq = IRQ_UART_TX;
		break;

	case CH_MEM_STREAM0_SRC:
	case CH_MEM_STREAM0_DEST:
		ret_irq = IRQ_MEM_DMA0;
		break;

	case CH_MEM_STREAM1_SRC:
	case CH_MEM_STREAM1_DEST:
		ret_irq = IRQ_MEM_DMA1;
		break;
	}
	return ret_irq;
}

# define channel2irq(channel) bf533_channel2irq(channel)

#else

static int bf561_channel2irq(unsigned int channel)
{
	int ret_irq = -1;

	switch (channel) {
	case CH_PPI0:
		ret_irq = IRQ_PPI0;
		break;
	case CH_PPI1:
		ret_irq = IRQ_PPI1;
		break;
	case CH_SPORT0_RX:
		ret_irq = IRQ_SPORT0_RX;
		break;
	case CH_SPORT0_TX:
		ret_irq = IRQ_SPORT0_TX;
		break;
	case CH_SPORT1_RX:
		ret_irq = IRQ_SPORT1_RX;
		break;
	case CH_SPORT1_TX:
		ret_irq = IRQ_SPORT1_TX;
		break;
	case CH_SPI:
		ret_irq = IRQ_SPI;
		break;
	case CH_UART_RX:
		ret_irq = IRQ_UART_RX;
		break;
	case CH_UART_TX:
		ret_irq = IRQ_UART_TX;
		break;

	case CH_MEM_STREAM0_SRC:
	case CH_MEM_STREAM0_DEST:
		ret_irq = IRQ_MEM_DMA0;
		break;
	case CH_MEM_STREAM1_SRC:
	case CH_MEM_STREAM1_DEST:
		ret_irq = IRQ_MEM_DMA1;
		break;
	case CH_MEM_STREAM2_SRC:
	case CH_MEM_STREAM2_DEST:
		ret_irq = IRQ_MEM_DMA2;
		break;
	case CH_MEM_STREAM3_SRC:
	case CH_MEM_STREAM3_DEST:
		ret_irq = IRQ_MEM_DMA3;
		break;

	case CH_IMEM_STREAM0_SRC:
	case CH_IMEM_STREAM0_DEST:
		ret_irq = IRQ_IMEM_DMA0;
		break;
	case CH_IMEM_STREAM1_SRC:
	case CH_IMEM_STREAM1_DEST:
		ret_irq = IRQ_IMEM_DMA1;
		break;
	}
	return ret_irq;
}

# define channel2irq(channel) bf561_channel2irq(channel)

#endif

/*------------------------------------------------------------------------------
/*------------------------------------------------------------------------------
 *	Request the specific DMA channel from the system.
 *	Request the specific DMA channel from the system.
 *-----------------------------------------------------------------------------*/
 *-----------------------------------------------------------------------------*/
+2 −1
Original line number Original line Diff line number Diff line
@@ -500,8 +500,9 @@ static void __fill_code_cplbtab(struct cplb_tab *t, int i,
					cplb_data[i].end,
					cplb_data[i].end,
					SIZE_4M,
					SIZE_4M,
					cplb_data[i].i_conf);
					cplb_data[i].i_conf);
		} else {
		} else
#endif
#endif
		{
			fill_cplbtab(t,
			fill_cplbtab(t,
					cplb_data[i].start,
					cplb_data[i].start,
					a_start,
					a_start,
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