Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 23ce62d2 authored by Andrew-CT Chen's avatar Andrew-CT Chen Committed by Mauro Carvalho Chehab
Browse files

[media] dt-bindings: Add a binding for Mediatek Video Processor



Add a DT binding documentation of Video Processor Unit for the
MT8173 SoC from Mediatek.

Signed-off-by: default avatarAndrew-CT Chen <andrew-ct.chen@mediatek.com>
Signed-off-by: default avatarTiffany Lin <tiffany.lin@mediatek.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@osg.samsung.com>
parent 9bd5d869
Loading
Loading
Loading
Loading
+31 −0
Original line number Diff line number Diff line
* Mediatek Video Processor Unit

Video Processor Unit is a HW video controller. It controls HW Codec including
H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color convert).

Required properties:
  - compatible: "mediatek,mt8173-vpu"
  - reg: Must contain an entry for each entry in reg-names.
  - reg-names: Must include the following entries:
    "tcm": tcm base
    "cfg_reg": Main configuration registers base
  - interrupts: interrupt number to the cpu.
  - clocks : clock name from clock manager
  - clock-names: must be main. It is the main clock of VPU

Optional properties:
  - memory-region: phandle to a node describing memory (see
    Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
    to be used for VPU extended memory; if not present, VPU may be located
    anywhere in the memory

Example:
	vpu: vpu@10020000 {
		compatible = "mediatek,mt8173-vpu";
		reg = <0 0x10020000 0 0x30000>,
		      <0 0x10050000 0 0x100>;
		reg-names = "tcm", "cfg_reg";
		interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&topckgen TOP_SCP_SEL>;
		clock-names = "main";
	};