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Commit 22613c96 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
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drm/i915: Make the DERRMR SRM target global GTT 



The ring scratch pages don't have a PPGTT mapping, so the DERRM SRM
should target the global GTT instead.

v2: Add MI_SRM_LRM_GLOBAL_GTT define for -fixes

Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent a1216444

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -235,6 +235,7 @@ 
 */

#define MI_LOAD_REGISTER_IMM(x)	MI_INSTR(0x22, 2*x-1)

#define MI_STORE_REGISTER_MEM(x) MI_INSTR(0x24, 2*x-1)

#define  MI_SRM_LRM_GLOBAL_GTT		(1<<22)

#define MI_FLUSH_DW		MI_INSTR(0x26, 1) /* for GEN6 */

#define   MI_FLUSH_DW_STORE_INDEX	(1<<21)

#define   MI_INVALIDATE_TLB		(1<<18)

drivers/gpu/drm/i915/intel_display.c

+2 −1
Original line number Diff line number Diff line
@@ -8354,7 +8354,8 @@ static int intel_gen7_queue_flip(struct drm_device *dev, 
		intel_ring_emit(ring, ~(DERRMR_PIPEA_PRI_FLIP_DONE |

					DERRMR_PIPEB_PRI_FLIP_DONE |

					DERRMR_PIPEC_PRI_FLIP_DONE));

		intel_ring_emit(ring, MI_STORE_REGISTER_MEM(1));

		intel_ring_emit(ring, MI_STORE_REGISTER_MEM(1) |

				MI_SRM_LRM_GLOBAL_GTT);

		intel_ring_emit(ring, DERRMR);

		intel_ring_emit(ring, ring->scratch.gtt_offset + 256);

	}