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Commit 225ce539 authored by Stephane Eranian's avatar Stephane Eranian Committed by Ingo Molnar
Browse files

perf/x86: Add Intel LBR MSR definitions 



This patch adds the LBR definitions for NHM/WSM/SNB and Core.
It also adds the definitions for the architected LBR MSR:
LBR_SELECT, LBRT_TOS.

Signed-off-by: default avatarStephane Eranian <eranian@google.com>
Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1328826068-11713-3-git-send-email-eranian@google.com


Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent bce38cd5

arch/x86/include/asm/msr-index.h

+7 −0
Original line number Diff line number Diff line
@@ -56,6 +56,13 @@ 
#define MSR_OFFCORE_RSP_0		0x000001a6

#define MSR_OFFCORE_RSP_1		0x000001a7



#define MSR_LBR_SELECT			0x000001c8

#define MSR_LBR_TOS			0x000001c9

#define MSR_LBR_NHM_FROM		0x00000680

#define MSR_LBR_NHM_TO			0x000006c0

#define MSR_LBR_CORE_FROM		0x00000040

#define MSR_LBR_CORE_TO			0x00000060



#define MSR_IA32_PEBS_ENABLE		0x000003f1

#define MSR_IA32_DS_AREA		0x00000600

#define MSR_IA32_PERF_CAPABILITIES	0x00000345

arch/x86/kernel/cpu/perf_event_intel_lbr.c

+9 −9
Original line number Diff line number Diff line
@@ -203,23 +203,23 @@ void intel_pmu_lbr_read(void) 
void intel_pmu_lbr_init_core(void)

{

	x86_pmu.lbr_nr     = 4;

	x86_pmu.lbr_tos    = 0x01c9;

	x86_pmu.lbr_from   = 0x40;

	x86_pmu.lbr_to     = 0x60;

	x86_pmu.lbr_tos    = MSR_LBR_TOS;

	x86_pmu.lbr_from   = MSR_LBR_CORE_FROM;

	x86_pmu.lbr_to     = MSR_LBR_CORE_TO;

}



void intel_pmu_lbr_init_nhm(void)

{

	x86_pmu.lbr_nr     = 16;

	x86_pmu.lbr_tos    = 0x01c9;

	x86_pmu.lbr_from   = 0x680;

	x86_pmu.lbr_to     = 0x6c0;

	x86_pmu.lbr_tos    = MSR_LBR_TOS;

	x86_pmu.lbr_from   = MSR_LBR_NHM_FROM;

	x86_pmu.lbr_to     = MSR_LBR_NHM_TO;

}



void intel_pmu_lbr_init_atom(void)

{

	x86_pmu.lbr_nr	   = 8;

	x86_pmu.lbr_tos    = 0x01c9;

	x86_pmu.lbr_from   = 0x40;

	x86_pmu.lbr_to     = 0x60;

	x86_pmu.lbr_tos    = MSR_LBR_TOS;

	x86_pmu.lbr_from   = MSR_LBR_CORE_FROM;

	x86_pmu.lbr_to     = MSR_LBR_CORE_TO;

}