Loading drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h +10 −1 Original line number Original line Diff line number Diff line Loading @@ -568,9 +568,18 @@ #define RCR_ACCEPT_CTRL_FRAME BIT(12) #define RCR_ACCEPT_CTRL_FRAME BIT(12) #define RCR_ACCEPT_MGMT_FRAME BIT(13) #define RCR_ACCEPT_MGMT_FRAME BIT(13) #define RCR_HTC_LOC_CTRL BIT(14) /* MFC<--HTC=1 MFC-->HTC=0 */ #define RCR_HTC_LOC_CTRL BIT(14) /* MFC<--HTC=1 MFC-->HTC=0 */ #define RCR_UC_DATA_PKT_INT_ENABLE BIT(16) /* Enable unicast data packet interrupt */ #define RCR_BM_DATA_PKT_INT_ENABLE BIT(17) /* Enable broadcast data packet interrupt */ #define RCR_TIM_PARSER_ENABLE BIT(18) /* Enable RX beacon TIM parser*/ #define RCR_MFBEN BIT(22) #define RCR_MFBEN BIT(22) #define RCR_LSIGEN BIT(23) #define RCR_LSIG_ENABLE BIT(23) /* Enable LSIG TXOP Protection function. Search KEYCAM for each rx packet to check if LSIGEN bit is set. */ #define RCR_MULTI_BSSID_ENABLE BIT(24) /* Enable Multiple BssId */ #define RCR_MULTI_BSSID_ENABLE BIT(24) /* Enable Multiple BssId */ #define RCR_FORCE_ACK BIT(26) #define RCR_ACCEPT_BA_SSN BIT(27) /* Accept BA SSN */ #define RCR_ACCEPT_BA_SSN BIT(27) /* Accept BA SSN */ #define RCR_APPEND_PHYSTAT BIT(28) #define RCR_APPEND_PHYSTAT BIT(28) #define RCR_APPEND_ICV BIT(29) #define RCR_APPEND_ICV BIT(29) Loading Loading
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h +10 −1 Original line number Original line Diff line number Diff line Loading @@ -568,9 +568,18 @@ #define RCR_ACCEPT_CTRL_FRAME BIT(12) #define RCR_ACCEPT_CTRL_FRAME BIT(12) #define RCR_ACCEPT_MGMT_FRAME BIT(13) #define RCR_ACCEPT_MGMT_FRAME BIT(13) #define RCR_HTC_LOC_CTRL BIT(14) /* MFC<--HTC=1 MFC-->HTC=0 */ #define RCR_HTC_LOC_CTRL BIT(14) /* MFC<--HTC=1 MFC-->HTC=0 */ #define RCR_UC_DATA_PKT_INT_ENABLE BIT(16) /* Enable unicast data packet interrupt */ #define RCR_BM_DATA_PKT_INT_ENABLE BIT(17) /* Enable broadcast data packet interrupt */ #define RCR_TIM_PARSER_ENABLE BIT(18) /* Enable RX beacon TIM parser*/ #define RCR_MFBEN BIT(22) #define RCR_MFBEN BIT(22) #define RCR_LSIGEN BIT(23) #define RCR_LSIG_ENABLE BIT(23) /* Enable LSIG TXOP Protection function. Search KEYCAM for each rx packet to check if LSIGEN bit is set. */ #define RCR_MULTI_BSSID_ENABLE BIT(24) /* Enable Multiple BssId */ #define RCR_MULTI_BSSID_ENABLE BIT(24) /* Enable Multiple BssId */ #define RCR_FORCE_ACK BIT(26) #define RCR_ACCEPT_BA_SSN BIT(27) /* Accept BA SSN */ #define RCR_ACCEPT_BA_SSN BIT(27) /* Accept BA SSN */ #define RCR_APPEND_PHYSTAT BIT(28) #define RCR_APPEND_PHYSTAT BIT(28) #define RCR_APPEND_ICV BIT(29) #define RCR_APPEND_ICV BIT(29) Loading
Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: