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Commit 21d889d4 authored by Rafał Miłecki's avatar Rafał Miłecki Committed by John W. Linville
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b43: bus: abstract 80211 core info

parent c0b4c009
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+3 −0
Original line number Diff line number Diff line
@@ -70,5 +70,8 @@ struct b43_bus_dev *b43_bus_dev_ssb_init(struct ssb_device *sdev)
	dev->block_read = b43_bus_ssb_block_read;
	dev->block_write = b43_bus_ssb_block_write;

	dev->core_id = sdev->id.coreid;
	dev->core_rev = sdev->id.revision;

	return dev;
}
+3 −0
Original line number Diff line number Diff line
@@ -19,6 +19,9 @@ struct b43_bus_dev {
			   size_t count, u16 offset, u8 reg_width);
	void (*block_write)(struct b43_bus_dev *dev, const void *buffer,
			    size_t count, u16 offset, u8 reg_width);

	u16 core_id;
	u8 core_rev;
};

struct b43_bus_dev *b43_bus_dev_ssb_init(struct ssb_device *sdev);
+1 −1
Original line number Diff line number Diff line
@@ -1085,7 +1085,7 @@ int b43_dma_init(struct b43_wldev *dev)
		goto err_destroy_mcast;

	/* No support for the TX status DMA ring. */
	B43_WARN_ON(dev->sdev->id.revision < 5);
	B43_WARN_ON(dev->dev->core_rev < 5);

	b43dbg(dev->wl, "%u-bit DMA initialized\n",
	       (unsigned int)type);
+15 −15
Original line number Diff line number Diff line
@@ -548,7 +548,7 @@ void b43_tsf_read(struct b43_wldev *dev, u64 *tsf)
{
	u32 low, high;

	B43_WARN_ON(dev->sdev->id.revision < 3);
	B43_WARN_ON(dev->dev->core_rev < 3);

	/* The hardware guarantees us an atomic read, if we
	 * read the low register first. */
@@ -586,7 +586,7 @@ static void b43_tsf_write_locked(struct b43_wldev *dev, u64 tsf)
{
	u32 low, high;

	B43_WARN_ON(dev->sdev->id.revision < 3);
	B43_WARN_ON(dev->dev->core_rev < 3);

	low = tsf;
	high = (tsf >> 32);
@@ -714,7 +714,7 @@ void b43_dummy_transmission(struct b43_wldev *dev, bool ofdm, bool pa_on)
		b43_ram_write(dev, i * 4, buffer[i]);

	b43_write16(dev, 0x0568, 0x0000);
	if (dev->sdev->id.revision < 11)
	if (dev->dev->core_rev < 11)
		b43_write16(dev, 0x07C0, 0x0000);
	else
		b43_write16(dev, 0x07C0, 0x0100);
@@ -1132,7 +1132,7 @@ void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags)
	b43_write32(dev, B43_MMIO_MACCTL, macctl);
	/* Commit write */
	b43_read32(dev, B43_MMIO_MACCTL);
	if (awake && dev->sdev->id.revision >= 5) {
	if (awake && dev->dev->core_rev >= 5) {
		/* Wait for the microcode to wake up. */
		for (i = 0; i < 100; i++) {
			ucstat = b43_shm_read16(dev, B43_SHM_SHARED,
@@ -1221,7 +1221,7 @@ static void drain_txstatus_queue(struct b43_wldev *dev)
{
	u32 dummy;

	if (dev->sdev->id.revision < 5)
	if (dev->dev->core_rev < 5)
		return;
	/* Read all entries from the microcode TXstatus FIFO
	 * and throw them away.
@@ -1689,7 +1689,7 @@ static void b43_update_templates(struct b43_wl *wl)
static void b43_set_beacon_int(struct b43_wldev *dev, u16 beacon_int)
{
	b43_time_lock(dev);
	if (dev->sdev->id.revision >= 3) {
	if (dev->dev->core_rev >= 3) {
		b43_write32(dev, B43_MMIO_TSF_CFP_REP, (beacon_int << 16));
		b43_write32(dev, B43_MMIO_TSF_CFP_START, (beacon_int << 10));
	} else {
@@ -2113,7 +2113,7 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
{
	struct b43_wldev *dev = ctx->dev;
	struct b43_firmware *fw = &ctx->dev->fw;
	const u8 rev = ctx->dev->sdev->id.revision;
	const u8 rev = ctx->dev->dev->core_rev;
	const char *filename;
	u32 tmshigh;
	int err;
@@ -2448,7 +2448,7 @@ static int b43_upload_microcode(struct b43_wldev *dev)

	snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
			dev->fw.rev, dev->fw.patch);
	wiphy->hw_version = dev->sdev->id.coreid;
	wiphy->hw_version = dev->dev->core_id;

	if (b43_is_old_txhdr_format(dev)) {
		/* We're over the deadline, but we keep support for old fw
@@ -2606,7 +2606,7 @@ static int b43_gpio_init(struct b43_wldev *dev)
		mask |= 0x0200;
		set |= 0x0200;
	}
	if (dev->sdev->id.revision >= 2)
	if (dev->dev->core_rev >= 2)
		mask |= 0x0010;	/* FIXME: This is redundant. */

	gpiodev = b43_ssb_gpio_dev(dev);
@@ -2741,7 +2741,7 @@ static void b43_adjust_opmode(struct b43_wldev *dev)
	/* Workaround: On old hardware the HW-MAC-address-filter
	 * doesn't work properly, so always run promisc in filter
	 * it in software. */
	if (dev->sdev->id.revision <= 4)
	if (dev->dev->core_rev <= 4)
		ctl |= B43_MACCTL_PROMISC;

	b43_write32(dev, B43_MMIO_MACCTL, ctl);
@@ -2907,7 +2907,7 @@ static int b43_chip_init(struct b43_wldev *dev)
		b43_write16(dev, 0x005E, value16);
	}
	b43_write32(dev, 0x0100, 0x01000000);
	if (dev->sdev->id.revision < 5)
	if (dev->dev->core_rev < 5)
		b43_write32(dev, 0x010C, 0x01000000);

	b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
@@ -2922,7 +2922,7 @@ static int b43_chip_init(struct b43_wldev *dev)
	/* Initially set the wireless operation mode. */
	b43_adjust_opmode(dev);

	if (dev->sdev->id.revision < 3) {
	if (dev->dev->core_rev < 3) {
		b43_write16(dev, 0x060E, 0x0000);
		b43_write16(dev, 0x0610, 0x8000);
		b43_write16(dev, 0x0604, 0x0000);
@@ -3105,7 +3105,7 @@ static int b43_validate_chipaccess(struct b43_wldev *dev)
	b43_shm_write32(dev, B43_SHM_SHARED, 0, backup0);
	b43_shm_write32(dev, B43_SHM_SHARED, 4, backup4);

	if ((dev->sdev->id.revision >= 3) && (dev->sdev->id.revision <= 10)) {
	if ((dev->dev->core_rev >= 3) && (dev->dev->core_rev <= 10)) {
		/* The 32bit register shadows the two 16bit registers
		 * with update sideeffects. Validate this. */
		b43_write16(dev, B43_MMIO_TSF_CFP_START, 0xAAAA);
@@ -4352,7 +4352,7 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
	if (err)
		goto err_busdown;
	b43_shm_write16(dev, B43_SHM_SHARED,
			B43_SHM_SH_WLCOREREV, dev->sdev->id.revision);
			B43_SHM_SH_WLCOREREV, dev->dev->core_rev);
	hf = b43_hf_read(dev);
	if (phy->type == B43_PHYTYPE_G) {
		hf |= B43_HF_SYMW;
@@ -4756,7 +4756,7 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
		goto out;
	}
	/* Get the PHY type. */
	if (dev->sdev->id.revision >= 5) {
	if (dev->dev->core_rev >= 5) {
		u32 tmshigh;

		tmshigh = ssb_read32(dev->sdev, SSB_TMSHIGH);
+2 −2
Original line number Diff line number Diff line
@@ -168,7 +168,7 @@ void b43_phy_lock(struct b43_wldev *dev)
	B43_WARN_ON(dev->phy.phy_locked);
	dev->phy.phy_locked = 1;
#endif
	B43_WARN_ON(dev->sdev->id.revision < 3);
	B43_WARN_ON(dev->dev->core_rev < 3);

	if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP))
		b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
@@ -180,7 +180,7 @@ void b43_phy_unlock(struct b43_wldev *dev)
	B43_WARN_ON(!dev->phy.phy_locked);
	dev->phy.phy_locked = 0;
#endif
	B43_WARN_ON(dev->sdev->id.revision < 3);
	B43_WARN_ON(dev->dev->core_rev < 3);

	if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP))
		b43_power_saving_ctl_bits(dev, 0);
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