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Commit 21769c67 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm/du/adv7511' of git://linuxtv.org/pinchartl/fbdev into drm-next 

The branch is based on a merge of drm-next and Simon's tags/renesas-dt-du-for-
v3.19 available at
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git, the latter
having been pulled in the ARM SoC tree for v3.19.

Compared to v1, I've rebased my branch on a later drm-next, added Julia's
error return code fix, and documented the "drm: Decouple EDID parsing from I2C
adapter" patch properly.

v1:
Here's a pull request that adds HDMI support to the R-Car DU driver, including
a new slave encoder driver for the adv7511.

* 'drm/du/adv7511' of git://linuxtv.org/pinchartl/fbdev:
  drm: Add adv7511 encoder driver
  video: Add ADV751[13] DT bindings documentation
  drm: Decouple EDID parsing from I2C adapter
  drm: rcar-du: Add HDMI encoder and connector support
  drm: rcar-du: Replace drm_encoder with drm_slave_encoder
  drm: rcar-du: Replace direct DRM encoder access with cast macro
  drm: rcar-du: Pass the encoder DT node to rcar_du_encoder_init()
  drm: rcar-du: Remove platform data support
  drm: rcar-du: fix error return code
  ARM: shmobile: koelsch: Enable DU device in DT
  ARM: shmobile: koelsch-reference: Remove DU platform device
  ARM: shmobile: lager: Enable DU device in DT
  ARM: shmobile: lager-reference: Remove DU platform device
  ARM: shmobile: marzen: Enable DU device in DT
  ARM: shmobile: dts: Add common file for AA104XD12 panel
  ARM: shmobile: r8a7791: Add DU node to device tree
  ARM: shmobile: r8a7790: Add DU node to device tree
  ARM: shmobile: r8a7779: Add DU node to device tree
  ARM: shmobile: Remove FSF address from copyright headers
parents 33f86ff6 9c8af882

Documentation/devicetree/bindings/video/adi,adv7511.txt

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Analog Device ADV7511(W)/13 HDMI Encoders

-----------------------------------------



The ADV7511, ADV7511W and ADV7513 are HDMI audio and video transmitters

compatible with HDMI 1.4 and DVI 1.0. They support color space conversion,

S/PDIF, CEC and HDCP.



Required properties:



- compatible: Should be one of "adi,adv7511", "adi,adv7511w" or "adi,adv7513"

- reg: I2C slave address



The ADV7511 supports a large number of input data formats that differ by their

color depth, color format, clock mode, bit justification and random

arrangement of components on the data bus. The combination of the following

properties describe the input and map directly to the video input tables of the

ADV7511 datasheet that document all the supported combinations.



- adi,input-depth: Number of bits per color component at the input (8, 10 or

  12).

- adi,input-colorspace: The input color space, one of "rgb", "yuv422" or

  "yuv444".

- adi,input-clock: The input clock type, one of "1x" (one clock cycle per

  pixel), "2x" (two clock cycles per pixel), "ddr" (one clock cycle per pixel,

  data driven on both edges).



The following input format properties are required except in "rgb 1x" and

"yuv444 1x" modes, in which case they must not be specified.



- adi,input-style: The input components arrangement variant (1, 2 or 3), as

  listed in the input format tables in the datasheet.

- adi,input-justification: The input bit justification ("left", "evenly",

  "right").



Optional properties:



- interrupts: Specifier for the ADV7511 interrupt

- pd-gpios: Specifier for the GPIO connected to the power down signal



- adi,clock-delay: Video data clock delay relative to the pixel clock, in ps

  (-1200 ps .. 1600 ps). Defaults to no delay.

- adi,embedded-sync: The input uses synchronization signals embedded in the

  data stream (similar to BT.656). Defaults to separate H/V synchronization

  signals.



Required nodes:



The ADV7511 has two video ports. Their connections are modelled using the OF

graph bindings specified in Documentation/devicetree/bindings/graph.txt.



- Video port 0 for the RGB or YUV input

- Video port 1 for the HDMI output





Example

-------



	adv7511w: hdmi@39 {

		compatible = "adi,adv7511w";

		reg = <39>;

		interrupt-parent = <&gpio3>;

		interrupts = <29 IRQ_TYPE_EDGE_FALLING>;



		adi,input-depth = <8>;

		adi,input-colorspace = "rgb";

		adi,input-clock = "1x";

		adi,input-style = <1>;

		adi,input-justification = "evenly";



		ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;

				adv7511w_in: endpoint {

					remote-endpoint = <&dpi_out>;

				};

			};



			port@1 {

				reg = <1>;

				adv7511_out: endpoint {

					remote-endpoint = <&hdmi_connector_in>;

				};

			};

		};

	};

arch/arm/boot/dts/r8a7779-marzen.dts

+83 −0
Original line number Diff line number Diff line
@@ -68,6 +68,78 @@ 
			gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;

		};

	};



	vga-encoder {

		compatible = "adi,adv7123";



		ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;

				vga_enc_in: endpoint {

					remote-endpoint = <&du_out_rgb0>;

				};

			};

			port@1 {

				reg = <1>;

				vga_enc_out: endpoint {

					remote-endpoint = <&vga_in>;

				};

			};

		};

	};



	vga {

		compatible = "vga-connector";



		port {

			vga_in: endpoint {

				remote-endpoint = <&vga_enc_out>;

			};

		};

	};



	lvds-encoder {

		compatible = "thine,thc63lvdm83d";



		ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;

				lvds_enc_in: endpoint {

					remote-endpoint = <&du_out_rgb1>;

				};

			};

			port@1 {

				reg = <1>;

				lvds_connector: endpoint {

				};

			};

		};

	};

};



&du {

	pinctrl-0 = <&du_pins>;

	pinctrl-names = "default";

	status = "okay";



	ports {

		port@0 {

			endpoint {

				remote-endpoint = <&vga_enc_in>;

			};

		};

		port@1 {

			endpoint {

				remote-endpoint = <&lvds_enc_in>;

			};

		};

	};

};



&irqpin0 {
@@ -83,6 +155,17 @@ 
};



&pfc {

	du_pins: du {

		du0 {

			renesas,groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0";

			renesas,function = "du0";

		};

		du1 {

			renesas,groups = "du1_rgb666", "du1_sync_1", "du1_clk_out";

			renesas,function = "du1";

		};

	};



	lan0_pins: lan0 {

		intc {

			renesas,groups = "intc_irq1_b";

arch/arm/boot/dts/r8a7779.dtsi

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Original line number Diff line number Diff line
@@ -379,6 +379,30 @@ 
		status = "disabled";

	};



	du: display@fff80000 {

		compatible = "renesas,du-r8a7779";

		reg = <0 0xfff80000 0 0x40000>;

		interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp1_clks R8A7779_CLK_DU>;

		status = "disabled";



		ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;

				du_out_rgb0: endpoint {

				};

			};

			port@1 {

				reg = <1>;

				du_out_rgb1: endpoint {

				};

			};

		};

	};



	clocks {

		#address-cells = <1>;

		#size-cells = <1>;

arch/arm/boot/dts/r8a7790-lager.dts

+50 −3
Original line number Diff line number Diff line
@@ -144,16 +144,63 @@ 
		states = <3300000 1

			  1800000 0>;

	};



	vga-encoder {

		compatible = "adi,adv7123";



		ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;

				adv7123_in: endpoint {

					remote-endpoint = <&du_out_rgb>;

				};

			};

			port@1 {

				reg = <1>;

				adv7123_out: endpoint {

					remote-endpoint = <&vga_in>;

				};

			};

		};

	};



&extal_clk {

	clock-frequency = <20000000>;

	vga {

		compatible = "vga-connector";



		port {

			vga_in: endpoint {

				remote-endpoint = <&adv7123_out>;

			};

		};

	};

};



&pfc {

&du {

	pinctrl-0 = <&du_pins>;

	pinctrl-names = "default";

	status = "okay";



	ports {

		port@0 {

			endpoint {

				remote-endpoint = <&adv7123_in>;

			};

		};

		port@2 {

			lvds_connector: endpoint {

			};

		};

	};

};



&extal_clk {

	clock-frequency = <20000000>;

};



&pfc {

	du_pins: du {

		renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0";

		renesas,function = "du";

arch/arm/boot/dts/r8a7790.dtsi

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Original line number Diff line number Diff line
@@ -600,6 +600,96 @@ 
		status = "disabled";

	};



	vsp1@fe920000 {

		compatible = "renesas,vsp1";

		reg = <0 0xfe920000 0 0x8000>;

		interrupts = <0 266 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;



		renesas,has-sru;

		renesas,#rpf = <5>;

		renesas,#uds = <1>;

		renesas,#wpf = <4>;

	};



	vsp1@fe928000 {

		compatible = "renesas,vsp1";

		reg = <0 0xfe928000 0 0x8000>;

		interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;



		renesas,has-lut;

		renesas,has-sru;

		renesas,#rpf = <5>;

		renesas,#uds = <3>;

		renesas,#wpf = <4>;

	};



	vsp1@fe930000 {

		compatible = "renesas,vsp1";

		reg = <0 0xfe930000 0 0x8000>;

		interrupts = <0 246 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;



		renesas,has-lif;

		renesas,has-lut;

		renesas,#rpf = <4>;

		renesas,#uds = <1>;

		renesas,#wpf = <4>;

	};



	vsp1@fe938000 {

		compatible = "renesas,vsp1";

		reg = <0 0xfe938000 0 0x8000>;

		interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;



		renesas,has-lif;

		renesas,has-lut;

		renesas,#rpf = <4>;

		renesas,#uds = <1>;

		renesas,#wpf = <4>;

	};



	du: display@feb00000 {

		compatible = "renesas,du-r8a7790";

		reg = <0 0xfeb00000 0 0x70000>,

		      <0 0xfeb90000 0 0x1c>,

		      <0 0xfeb94000 0 0x1c>;

		reg-names = "du", "lvds.0", "lvds.1";

		interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,

			     <0 268 IRQ_TYPE_LEVEL_HIGH>,

			     <0 269 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp7_clks R8A7790_CLK_DU0>,

			 <&mstp7_clks R8A7790_CLK_DU1>,

			 <&mstp7_clks R8A7790_CLK_DU2>,

			 <&mstp7_clks R8A7790_CLK_LVDS0>,

			 <&mstp7_clks R8A7790_CLK_LVDS1>;

		clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";

		status = "disabled";



		ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;

				du_out_rgb: endpoint {

				};

			};

			port@1 {

				reg = <1>;

				du_out_lvds0: endpoint {

				};

			};

			port@2 {

				reg = <2>;

				du_out_lvds1: endpoint {

				};

			};

		};

	};



	clocks {

		#address-cells = <2>;

		#size-cells = <2>;