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Commit 217275d0 authored by Francisco Jerez's avatar Francisco Jerez Committed by Ben Skeggs
Browse files

drm/nv40: Try to set up CRE_LCD even if it has unknown bits set. 



They don't seem to do anything useful, and we really want to program
CRE_LCD if we aren't lucky enough to find the right CRTC binding
already set.

Signed-off-by: default avatarFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 7314dec9

drivers/gpu/drm/nouveau/nv04_dac.c

+1 −7
Original line number Diff line number Diff line
@@ -352,15 +352,9 @@ static void nv04_dac_prepare(struct drm_encoder *encoder) 
	helper->dpms(encoder, DRM_MODE_DPMS_OFF);



	nv04_dfp_disable(dev, head);



	/* Some NV4x have unknown values (0x3f, 0x50, 0x54, 0x6b, 0x79, 0x7f)

	 * at LCD__INDEX which we don't alter

	 */

	if (!(crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX] & 0x44))

	crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX] = 0;

}





static void nv04_dac_mode_set(struct drm_encoder *encoder,

			      struct drm_display_mode *mode,

			      struct drm_display_mode *adjusted_mode)

drivers/gpu/drm/nouveau/nv04_dfp.c

+15 −20
Original line number Diff line number Diff line
@@ -253,10 +253,6 @@ static void nv04_dfp_prepare(struct drm_encoder *encoder) 


	nv04_dfp_prepare_sel_clk(dev, nv_encoder, head);



	/* Some NV4x have unknown values (0x3f, 0x50, 0x54, 0x6b, 0x79, 0x7f)

	 * at LCD__INDEX which we don't alter

	 */

	if (!(*cr_lcd & 0x44)) {

	*cr_lcd = 0x3;



	if (nv_two_heads(dev)) {
@@ -276,7 +272,6 @@ static void nv04_dfp_prepare(struct drm_encoder *encoder) 
		}

	}

}

}





static void nv04_dfp_mode_set(struct drm_encoder *encoder,

drivers/gpu/drm/nouveau/nv17_tv.c

+4 −9
Original line number Diff line number Diff line
@@ -408,15 +408,10 @@ static void nv17_tv_prepare(struct drm_encoder *encoder) 


	}



	/* Some NV4x have unknown values (0x3f, 0x50, 0x54, 0x6b, 0x79, 0x7f)

	 * at LCD__INDEX which we don't alter

	 */

	if (!(*cr_lcd & 0x44)) {

	if (tv_norm->kind == CTV_ENC_MODE)

		*cr_lcd = 0x1 | (head ? 0x0 : 0x8);

	else

		*cr_lcd = 0;

	}



	/* Set the DACCLK register */

	dacclk = (NVReadRAMDAC(dev, 0, dacclk_off) & ~0x30) | 0x1;