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Commit 21481f2c authored by Vineet Gupta's avatar Vineet Gupta
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ARCv2: lib: memcpy: Missing PREFETCHW

parent d05a76ab
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+1 −1
Original line number Diff line number Diff line
@@ -206,7 +206,7 @@ unalignedOffby3:
	ld.ab	r6, [r1, 4]
	prefetch [r1, 28]	;Prefetch the next read location
	ld.ab	r8, [r1,4]
	prefetch [r3, 32]	;Prefetch the next write location
	prefetchw [r3, 32]	;Prefetch the next write location

	SHIFT_1	(r7, r6, 8)
	or	r7, r7, r5