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Commit 208d7baf authored by Russell King's avatar Russell King
Browse files

ARM: imx: initial SolidRun HummingBoard support 



Add support for the SolidRun HummingBoard.  This commit adds support for
the following interfaces on this board:

- Consumer Ir receiver
- S/PDIF output
- Both USB interfaces
- Gigabit Ethernet using AR8035
- UART port

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent d8ec26d7

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -136,6 +136,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ 
	imx53-mba53.dtb \

	imx53-qsb.dtb \

	imx53-smd.dtb \

	imx6dl-hummingboard.dtb \

	imx6dl-sabreauto.dtb \

	imx6dl-sabresd.dtb \

	imx6dl-wandboard.dtb \

arch/arm/boot/dts/imx6dl-hummingboard.dts

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/*

 * Copyright (C) 2013,2014 Russell King

 */

/dts-v1/;



#include "imx6dl.dtsi"

#include "imx6qdl-microsom.dtsi"

#include "imx6qdl-microsom-ar8035.dtsi"



/ {

	model = "SolidRun HummingBoard DL/Solo";

	compatible = "solidrun,hummingboard", "fsl,imx6dl";



	ir_recv: ir-receiver {

		compatible = "gpio-ir-receiver";

		gpios = <&gpio1 2 1>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_hummingboard_gpio1_2>;

	};



	regulators {

		compatible = "simple-bus";



		reg_3p3v: 3p3v {

			compatible = "regulator-fixed";

			regulator-name = "3P3V";

			regulator-min-microvolt = <3300000>;

			regulator-max-microvolt = <3300000>;

			regulator-always-on;

		};



		reg_usbh1_vbus: usb-h1-vbus {

			compatible = "regulator-fixed";

			enable-active-high;

			gpio = <&gpio1 0 0>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>;

			regulator-name = "usb_h1_vbus";

			regulator-min-microvolt = <5000000>;

			regulator-max-microvolt = <5000000>;

		};



		reg_usbotg_vbus: usb-otg-vbus {

			compatible = "regulator-fixed";

			enable-active-high;

			gpio = <&gpio3 22 0>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>;

			regulator-name = "usb_otg_vbus";

			regulator-min-microvolt = <5000000>;

			regulator-max-microvolt = <5000000>;

		};

	};



	codec: spdif-transmitter {

		compatible = "linux,spdif-dit";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_hummingboard_spdif>;

	};



	sound-spdif {

		compatible = "fsl,imx-audio-spdif";

		model = "imx-spdif";

		/* IMX6 doesn't implement this yet */

		spdif-controller = <&spdif>;

		spdif-out;

	};

};



&can1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_hummingboard_flexcan1>;

	status = "okay";

};



&i2c1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_hummingboard_i2c1>;



	/*

	 * Not fitted on Carrier-1 board... yet

	status = "okay";



	rtc: pcf8523@68 {

		compatible = "nxp,pcf8523";

		reg = <0x68>;

	};

	 */

};



&iomuxc {

	hummingboard {

		pinctrl_hummingboard_flexcan1: hummingboard-flexcan1 {

			fsl,pins = <

				MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000

				MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x80000000

			>;

		};



		pinctrl_hummingboard_gpio1_2: hummingboard-gpio1_2 {

			fsl,pins = <

				MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000

			>;

		};



		pinctrl_hummingboard_i2c1: hummingboard-i2c1 {

			fsl,pins = <

				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1

				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1

			>;

		};



		pinctrl_hummingboard_spdif: hummingboard-spdif {

			fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0>;

		};



		pinctrl_hummingboard_usbh1_vbus: hummingboard-usbh1-vbus {

			fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;

		};



		pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {

			fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;

		};



		pinctrl_hummingboard_usdhc2_aux: hummingboard-usdhc2-aux {

			fsl,pins = <

				MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x1f071

			>;

		};



		pinctrl_hummingboard_usdhc2: hummingboard-usdhc2 {

			fsl,pins = <

				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059

				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059

				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059

				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059

				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059

				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059

			>;

		};

	};

};



&spdif {

	status = "okay";

};



&usbh1 {

	vbus-supply = <&reg_usbh1_vbus>;

	status = "okay";

};



&usbotg {

	vbus-supply = <&reg_usbotg_vbus>;

	status = "okay";

};



&usdhc2 {

	pinctrl-names = "default";

	pinctrl-0 = <

		&pinctrl_hummingboard_usdhc2_aux

		&pinctrl_hummingboard_usdhc2

	>;

	vmmc-supply = <&reg_3p3v>;

	cd-gpios = <&gpio1 4 0>;

	status = "okay";

};

arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi

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/*

 * Copyright (C) 2013,2014 Russell King

 *

 * This describes the hookup for an AR8035 to the iMX6 on the SolidRun

 * MicroSOM.

 */

&fec {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;

	phy-mode = "rgmii";

	phy-reset-duration = <2>;

	phy-reset-gpios = <&gpio4 15 0>;

	status = "okay";

};



&iomuxc {

	enet {

		pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {

			fsl,pins = <

				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0

				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0

				/* AR8035 reset */

				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x130b0

				/* AR8035 interrupt */

				MX6QDL_PAD_DI0_PIN2__GPIO4_IO18		0x80000000

				/* GPIO16 -> AR8035 25MHz */

				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0xc0000000

				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x80000000

				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0

				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0

				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0

				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0

				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0

				/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */

				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x0a0b1

				/* AR8035 pin strapping: IO voltage: pull up */

				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0

				/* AR8035 pin strapping: PHYADDR#0: pull down */

				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x130b0

				/* AR8035 pin strapping: PHYADDR#1: pull down */

				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x130b0

				/* AR8035 pin strapping: MODE#1: pull up */

				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0

				/* AR8035 pin strapping: MODE#3: pull up */

				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0

				/* AR8035 pin strapping: MODE#0: pull down */

				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x130b0



				/*

				 * As the RMII pins are also connected to RGMII

				 * so that an AR8030 can be placed, set these

				 * to high-z with the same pulls as above.

				 * Use the GPIO settings to avoid changing the

				 * input select registers.

				 */

				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x03000

				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x03000

				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x03000

			>;

		};

	};

};

arch/arm/boot/dts/imx6qdl-microsom.dtsi

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/*

 * Copyright (C) 2013,2014 Russell King

 */



&iomuxc {

	microsom {

		pinctrl_microsom_uart1: microsom-uart1 {

			fsl,pins = <

				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1

				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1

			>;

		};



		pinctrl_microsom_usbotg: microsom-usbotg {

			/*

			 * Similar to pinctrl_usbotg_2, but we want it

			 * pulled down for a fixed host connection.

			 */

			fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;

		};

	};

};



&uart1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_microsom_uart1>;

	status = "okay";

};



&usbotg {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_microsom_usbotg>;

};

arch/arm/mach-imx/mach-imx6q.c

+35 −0
Original line number Diff line number Diff line
@@ -103,6 +103,39 @@ static int ar8031_phy_fixup(struct phy_device *dev) 


#define PHY_ID_AR8031	0x004dd074



static int ar8035_phy_fixup(struct phy_device *dev)

{

	u16 val;



	/* Ar803x phy SmartEEE feature cause link status generates glitch,

	 * which cause ethernet link down/up issue, so disable SmartEEE

	 */

	phy_write(dev, 0xd, 0x3);

	phy_write(dev, 0xe, 0x805d);

	phy_write(dev, 0xd, 0x4003);



	val = phy_read(dev, 0xe);

	phy_write(dev, 0xe, val & ~(1 << 8));



	/*

	 * Enable 125MHz clock from CLK_25M on the AR8031.  This

	 * is fed in to the IMX6 on the ENET_REF_CLK (V22) pad.

	 * Also, introduce a tx clock delay.

	 *

	 * This is the same as is the AR8031 fixup.

	 */

	ar8031_phy_fixup(dev);



	/*check phy power*/

	val = phy_read(dev, 0x0);

	if (val & BMCR_PDOWN)

		phy_write(dev, 0x0, val & ~BMCR_PDOWN);



	return 0;

}



#define PHY_ID_AR8035 0x004dd072



static void __init imx6q_enet_phy_init(void)

{

	if (IS_BUILTIN(CONFIG_PHYLIB)) {
@@ -112,6 +145,8 @@ static void __init imx6q_enet_phy_init(void) 
				ksz9031rn_phy_fixup);

		phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff,

				ar8031_phy_fixup);

		phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef,

				ar8035_phy_fixup);

	}

}