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Commit 1fada4cc authored by Damien Lespiau's avatar Damien Lespiau Committed by Daniel Vetter
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drm/i915/skl: Framebuffers need to be aligned to 256KB on Skylake 



v2: Also align X tiled fbs to 256KB (Thomas)

Reviewed-by: default avatarThomas Wood <thomas.wood@intel.com>
Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent fbdcb068

drivers/gpu/drm/i915/intel_display.c

+9 −3
Original line number Original line Diff line number Diff line
@@ -2199,7 +2199,9 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev, 




	switch (obj->tiling_mode) {

	switch (obj->tiling_mode) {

	case I915_TILING_NONE:

	case I915_TILING_NONE:

		if (IS_BROADWATER(dev) || IS_CRESTLINE(dev))

		if (INTEL_INFO(dev)->gen >= 9)

			alignment = 256 * 1024;

		else if (IS_BROADWATER(dev) || IS_CRESTLINE(dev))

			alignment = 128 * 1024;

			alignment = 128 * 1024;

		else if (INTEL_INFO(dev)->gen >= 4)

		else if (INTEL_INFO(dev)->gen >= 4)

			alignment = 4 * 1024;

			alignment = 4 * 1024;
@@ -2207,8 +2209,12 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev, 
			alignment = 64 * 1024;

			alignment = 64 * 1024;

		break;

		break;

	case I915_TILING_X:

	case I915_TILING_X:

		if (INTEL_INFO(dev)->gen >= 9)

			alignment = 256 * 1024;

		else {

			/* pin() will align the object as required by fence */

			/* pin() will align the object as required by fence */

			alignment = 0;

			alignment = 0;

		}

		break;

		break;

	case I915_TILING_Y:

	case I915_TILING_Y:

		WARN(1, "Y tiled bo slipped through, driver bug!\n");

		WARN(1, "Y tiled bo slipped through, driver bug!\n");