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Commit 1f9ac57c authored by Don Skidmore's avatar Don Skidmore Committed by Jeff Kirsher
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ixgbe: add new wrapper for X550 support 



For the X550 mac type we have to do additional steps around
enabling/disabling Rx.  This patch will add a layer of indirection
around these support functions to enable this.

CC: <kernel-team@fb.com>
Signed-off-by: default avatarDon Skidmore <donald.c.skidmore@intel.com>
Tested-by: default avatarPhil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 2801be4a

drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c

+2 −0
Original line number Diff line number Diff line
@@ -1193,6 +1193,8 @@ static struct ixgbe_mac_operations mac_ops_82598 = { 
	.init_thermal_sensor_thresh = NULL,

	.prot_autoc_read	= &prot_autoc_read_generic,

	.prot_autoc_write	= &prot_autoc_write_generic,

	.enable_rx		= &ixgbe_enable_rx_generic,

	.disable_rx		= &ixgbe_disable_rx_generic,

};



static struct ixgbe_eeprom_operations eeprom_ops_82598 = {

drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c

+6 −1
Original line number Diff line number Diff line
@@ -1977,7 +1977,10 @@ static s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval) 
	 */

	hw->mac.ops.disable_rx_buff(hw);



	IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, regval);

	if (regval & IXGBE_RXCTRL_RXEN)

		hw->mac.ops.enable_rx(hw);

	else

		hw->mac.ops.disable_rx(hw);



	hw->mac.ops.enable_rx_buff(hw);
@@ -2336,6 +2339,8 @@ static struct ixgbe_mac_operations mac_ops_82599 = { 
	.init_thermal_sensor_thresh = &ixgbe_init_thermal_sensor_thresh_generic,

	.prot_autoc_read	= &prot_autoc_read_82599,

	.prot_autoc_write	= &prot_autoc_write_82599,

	.enable_rx		= &ixgbe_enable_rx_generic,

	.disable_rx		= &ixgbe_disable_rx_generic,

};



static struct ixgbe_eeprom_operations eeprom_ops_82599 = {

drivers/net/ethernet/intel/ixgbe/ixgbe_common.c

+46 −2
Original line number Diff line number Diff line
@@ -703,7 +703,7 @@ s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw) 
	hw->adapter_stopped = true;



	/* Disable the receive unit */

	IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, 0);

	hw->mac.ops.disable_rx(hw);



	/* Clear interrupt mask to stop interrupts from being generated */

	IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
@@ -2639,7 +2639,10 @@ s32 ixgbe_enable_rx_buff_generic(struct ixgbe_hw *hw) 
 **/

s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval)

{

	IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, regval);

	if (regval & IXGBE_RXCTRL_RXEN)

		hw->mac.ops.enable_rx(hw);

	else

		hw->mac.ops.disable_rx(hw);



	return 0;

}
@@ -3850,3 +3853,44 @@ s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw) 
	return 0;

}



void ixgbe_disable_rx_generic(struct ixgbe_hw *hw)

{

	u32 rxctrl;



	rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);

	if (rxctrl & IXGBE_RXCTRL_RXEN) {

		if (hw->mac.type != ixgbe_mac_82598EB) {

			u32 pfdtxgswc;



			pfdtxgswc = IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC);

			if (pfdtxgswc & IXGBE_PFDTXGSWC_VT_LBEN) {

				pfdtxgswc &= ~IXGBE_PFDTXGSWC_VT_LBEN;

				IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc);

				hw->mac.set_lben = true;

			} else {

				hw->mac.set_lben = false;

			}

		}

		rxctrl &= ~IXGBE_RXCTRL_RXEN;

		IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl);

	}

}



void ixgbe_enable_rx_generic(struct ixgbe_hw *hw)

{

	u32 rxctrl;



	rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);

	IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, (rxctrl | IXGBE_RXCTRL_RXEN));



	if (hw->mac.type != ixgbe_mac_82598EB) {

		if (hw->mac.set_lben) {

			u32 pfdtxgswc;



			pfdtxgswc = IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC);

			pfdtxgswc |= IXGBE_PFDTXGSWC_VT_LBEN;

			IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc);

			hw->mac.set_lben = false;

		}

	}

}

drivers/net/ethernet/intel/ixgbe/ixgbe_common.h

+2 −0
Original line number Diff line number Diff line
@@ -130,6 +130,8 @@ void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, 


s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw);

s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw);

void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);

void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);



#define IXGBE_FAILED_READ_REG 0xffffffffU

#define IXGBE_FAILED_READ_CFG_DWORD 0xffffffffU

drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c

+7 −6
Original line number Diff line number Diff line
@@ -1637,9 +1637,7 @@ static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter) 
	/* shut down the DMA engines now so they can be reinitialized later */



	/* first Rx */

	reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);

	reg_ctl &= ~IXGBE_RXCTRL_RXEN;

	IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);

	hw->mac.ops.disable_rx(hw);

	ixgbe_disable_rx_queue(adapter, rx_ring);



	/* now Tx */
@@ -1670,6 +1668,7 @@ static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter) 
{

	struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;

	struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;

	struct ixgbe_hw *hw = &adapter->hw;

	u32 rctl, reg_data;

	int ret_val;

	int err;
@@ -1713,14 +1712,16 @@ static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter) 
		goto err_nomem;

	}



	rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);

	IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);

	hw->mac.ops.disable_rx(hw);



	ixgbe_configure_rx_ring(adapter, rx_ring);



	rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;

	rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);

	rctl |= IXGBE_RXCTRL_DMBYPS;

	IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);



	hw->mac.ops.enable_rx(hw);



	return 0;



err_nomem: