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Commit 1f42db78 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

PCI: Enable INTx if BIOS left them disabled 

Some firmware leaves the Interrupt Disable bit set even if the device uses
INTx interrupts.  Clear Interrupt Disable so we get those interrupts.

Based on the report mentioned below, if the user selects the "EHCI only"
option in the Intel Baytrail BIOS, the EHCI device is handed off to the OS
with the PCI_COMMAND_INTX_DISABLE bit set.

Link: http://lkml.kernel.org/r/20140114181721.GC12126@xanatos
Link: https://bugzilla.kernel.org/show_bug.cgi?id=70601


Reported-by: default avatarChris Cheng <chris.cheng@atrustcorp.com>
Reported-and-tested-by: default avatarJamie Chen <jamie.chen@intel.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
CC: stable@vger.kernel.org
CC: Sarah Sharp <sarah.a.sharp@linux.intel.com>
parent 3ce4e860

drivers/pci/pci.c

+10 −0
Original line number Diff line number Diff line
@@ -1181,6 +1181,8 @@ EXPORT_SYMBOL_GPL(pci_load_and_free_saved_state); 
static int do_pci_enable_device(struct pci_dev *dev, int bars)

{

	int err;

	u16 cmd;

	u8 pin;



	err = pci_set_power_state(dev, PCI_D0);

	if (err < 0 && err != -EIO)
@@ -1190,6 +1192,14 @@ static int do_pci_enable_device(struct pci_dev *dev, int bars) 
		return err;

	pci_fixup_device(pci_fixup_enable, dev);



	pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);

	if (pin) {

		pci_read_config_word(dev, PCI_COMMAND, &cmd);

		if (cmd & PCI_COMMAND_INTX_DISABLE)

			pci_write_config_word(dev, PCI_COMMAND,

					      cmd & ~PCI_COMMAND_INTX_DISABLE);

	}



	return 0;

}