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Commit 1f05c944 authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
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drm/i915: Store the HW min frequency as min_freq 



this leaves a temporarily awkward min_delay (the soft limit) with the
new min_freq (the hardware limit). It's fixed in the next patch.

Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 5a953add

drivers/gpu/drm/i915/i915_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -987,6 +987,7 @@ struct intel_gen6_power_mgmt { 
	u8 rp1_delay;

	u8 rp0_delay;

	u8 hw_max;

	u8 min_freq;



	bool rp_up_masked;

	bool rp_down_masked;

drivers/gpu/drm/i915/intel_pm.c

+1 −1
Original line number Diff line number Diff line
@@ -3354,7 +3354,7 @@ static void gen6_enable_rps(struct drm_device *dev) 


	/* In units of 50MHz */

	dev_priv->rps.hw_max = hw_max = rp_state_cap & 0xff;

	hw_min = (rp_state_cap >> 16) & 0xff;

	dev_priv->rps.min_freq = hw_min = (rp_state_cap >> 16) & 0xff;

	dev_priv->rps.rp1_delay = (rp_state_cap >>  8) & 0xff;

	dev_priv->rps.rp0_delay = (rp_state_cap >>  0) & 0xff;

	dev_priv->rps.rpe_delay = dev_priv->rps.rp1_delay;