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Commit 1e6f2ddc authored by Ander Conselvan de Oliveira's avatar Ander Conselvan de Oliveira Committed by Daniel Vetter
Browse files

drm/i915: Convert shared dpll reference count to a crtc mask 



This will be used in a follow up patch to properly release shared DPLLs
without relying on the shared_dpll field in pipe_config.

v2: Fix white space error (Ville)
    Use hweight32() (Ville)

Signed-off-by: default avatarAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 0a88818d

drivers/gpu/drm/i915/i915_debugfs.c

+2 −2
Original line number Diff line number Diff line
@@ -2630,8 +2630,8 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused) 
		struct intel_shared_dpll *pll = &dev_priv->shared_dplls[i];



		seq_printf(m, "DPLL%i: %s, id: %i\n", i, pll->name, pll->id);

		seq_printf(m, " refcount: %i, active: %i, on: %s\n", pll->refcount,

			   pll->active, yesno(pll->on));

		seq_printf(m, " crtc_mask: 0x%08x, active: %d, on: %s\n",

			   pll->crtc_mask, pll->active, yesno(pll->on));

		seq_printf(m, " tracked hardware state:\n");

		seq_printf(m, " dpll:    0x%08x\n", pll->hw_state.dpll);

		seq_printf(m, " dpll_md: 0x%08x\n", pll->hw_state.dpll_md);

drivers/gpu/drm/i915/i915_drv.h

+1 −1
Original line number Diff line number Diff line
@@ -230,7 +230,7 @@ struct intel_dpll_hw_state { 
};



struct intel_shared_dpll {

	int refcount; /* count of number of CRTCs sharing this PLL */

	unsigned crtc_mask; /* mask of CRTCs sharing this PLL */

	int active; /* count of number of active CRTCs (i.e. DPMS on) */

	bool on; /* is the PLL actually active? Disabled during modeset */

	const char *name;

drivers/gpu/drm/i915/intel_display.c

+27 −23
Original line number Diff line number Diff line
@@ -1779,7 +1779,7 @@ static void intel_prepare_shared_dpll(struct intel_crtc *crtc) 
	if (WARN_ON(pll == NULL))

		return;



	WARN_ON(!pll->refcount);

	WARN_ON(!pll->crtc_mask);

	if (pll->active == 0) {

		DRM_DEBUG_DRIVER("setting up %s\n", pll->name);

		WARN_ON(pll->on);
@@ -1806,7 +1806,7 @@ static void intel_enable_shared_dpll(struct intel_crtc *crtc) 
	if (WARN_ON(pll == NULL))

		return;



	if (WARN_ON(pll->refcount == 0))

	if (WARN_ON(pll->crtc_mask == 0))

		return;



	DRM_DEBUG_KMS("enable %s (active %d, on? %d) for crtc %d\n",
@@ -1838,7 +1838,7 @@ static void intel_disable_shared_dpll(struct intel_crtc *crtc) 
	if (WARN_ON(pll == NULL))

	       return;



	if (WARN_ON(pll->refcount == 0))

	if (WARN_ON(pll->crtc_mask == 0))

		return;



	DRM_DEBUG_KMS("disable %s (active %d, on? %d) for crtc %d\n",
@@ -3846,12 +3846,13 @@ void intel_put_shared_dpll(struct intel_crtc *crtc) 
	if (pll == NULL)

		return;



	if (pll->refcount == 0) {

		WARN(1, "bad %s refcount\n", pll->name);

	if (!(pll->crtc_mask & (1 << crtc->pipe))) {

		WARN(1, "bad %s crtc mask\n", pll->name);

		return;

	}



	if (--pll->refcount == 0) {

	pll->crtc_mask &= ~(1 << crtc->pipe);

	if (pll->crtc_mask == 0) {

		WARN_ON(pll->on);

		WARN_ON(pll->active);

	}
@@ -3879,7 +3880,7 @@ struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc) 
		DRM_DEBUG_KMS("CRTC:%d using pre-allocated %s\n",

			      crtc->base.base.id, pll->name);



		WARN_ON(pll->refcount);

		WARN_ON(pll->crtc_mask);



		goto found;

	}
@@ -3888,14 +3889,15 @@ struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc) 
		pll = &dev_priv->shared_dplls[i];



		/* Only want to check enabled timings first */

		if (pll->refcount == 0)

		if (pll->crtc_mask == 0)

			continue;



		if (memcmp(&crtc->config.dpll_hw_state, &pll->hw_state,

			   sizeof(pll->hw_state)) == 0) {

			DRM_DEBUG_KMS("CRTC:%d sharing existing %s (refcount %d, ative %d)\n",

				      crtc->base.base.id,

				      pll->name, pll->refcount, pll->active);

			DRM_DEBUG_KMS("CRTC:%d sharing existing %s "

				      "(crtc_mask 0x%08x, active %d)\n",

				      crtc->base.base.id, pll->name,

				      pll->crtc_mask, pll->active);



			goto found;

		}
@@ -3904,7 +3906,7 @@ struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc) 
	/* Ok no matching timings, maybe there's a free one? */

	for (i = 0; i < dev_priv->num_shared_dpll; i++) {

		pll = &dev_priv->shared_dplls[i];

		if (pll->refcount == 0) {

		if (pll->crtc_mask == 0) {

			DRM_DEBUG_KMS("CRTC:%d allocated %s\n",

				      crtc->base.base.id, pll->name);

			goto found;
@@ -3914,14 +3916,14 @@ struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc) 
	return NULL;



found:

	if (pll->refcount == 0)

	if (pll->crtc_mask == 0)

		pll->hw_state = crtc->config.dpll_hw_state;



	crtc->config.shared_dpll = i;

	DRM_DEBUG_DRIVER("using %s for pipe %c\n", pll->name,

			 pipe_name(crtc->pipe));



	pll->refcount++;

	pll->crtc_mask |= 1 << crtc->pipe;



	return pll;

}
@@ -10604,9 +10606,9 @@ check_shared_dpll_state(struct drm_device *dev) 


		active = pll->get_hw_state(dev_priv, pll, &dpll_hw_state);



		WARN(pll->active > pll->refcount,

		WARN(pll->active > hweight32(pll->crtc_mask),

		     "more active pll users than references: %i vs %i\n",

		     pll->active, pll->refcount);

		     pll->active, hweight32(pll->crtc_mask));

		WARN(pll->active && !pll->on,

		     "pll in active use but not on in sw tracking\n");

		WARN(pll->on && !pll->active,
@@ -10624,9 +10626,9 @@ check_shared_dpll_state(struct drm_device *dev) 
		WARN(pll->active != active_crtcs,

		     "pll active crtcs mismatch (expected %i, found %i)\n",

		     pll->active, active_crtcs);

		WARN(pll->refcount != enabled_crtcs,

		WARN(hweight32(pll->crtc_mask) != enabled_crtcs,

		     "pll enabled crtcs mismatch (expected %i, found %i)\n",

		     pll->refcount, enabled_crtcs);

		     hweight32(pll->crtc_mask), enabled_crtcs);



		WARN(pll->on && memcmp(&pll->hw_state, &dpll_hw_state,

				       sizeof(dpll_hw_state)),
@@ -13077,16 +13079,18 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) 


		pll->on = pll->get_hw_state(dev_priv, pll, &pll->hw_state);

		pll->active = 0;

		pll->crtc_mask = 0;

		for_each_intel_crtc(dev, crtc) {

			if (crtc->active && intel_crtc_to_shared_dpll(crtc) == pll)

			if (crtc->active && intel_crtc_to_shared_dpll(crtc) == pll) {

				pll->active++;

				pll->crtc_mask |= 1 << crtc->pipe;

			}

		}

		pll->refcount = pll->active;



		DRM_DEBUG_KMS("%s hw state readout: refcount %i, on %i\n",

			      pll->name, pll->refcount, pll->on);

		DRM_DEBUG_KMS("%s hw state readout: crtc_mask 0x%08x, on %i\n",

			      pll->name, pll->crtc_mask, pll->on);



		if (pll->refcount)

		if (pll->crtc_mask)

			intel_display_power_get(dev_priv, POWER_DOMAIN_PLLS);

	}