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Commit 1dbcfb22 authored by Jon Mason's avatar Jon Mason Committed by Florian Fainelli
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ARM: dts: NSP: Add PCI support 



Add PCI support to the Northstar Plus SoC.  This uses the existing
pcie-iproc driver.  So, all that is needed is device tree entries in the
DTS.

Signed-off-by: default avatarJon Mason <jonmason@broadcom.com>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent 8005c49d

arch/arm/boot/dts/bcm-nsp.dtsi

+73 −1
Original line number Original line Diff line number Diff line
@@ -96,7 +96,7 @@ 




	axi {

	axi {

		compatible = "simple-bus";

		compatible = "simple-bus";

		ranges = <0x00000000 0x18000000 0x00001000>;

		ranges = <0x00000000 0x18000000 0x00015000>;

		#address-cells = <1>;

		#address-cells = <1>;

		#size-cells = <1>;

		#size-cells = <1>;
@@ -115,5 +115,77 @@ 
			clock-frequency = <62499840>;

			clock-frequency = <62499840>;

			status = "disabled";

			status = "disabled";

		};

		};



		pcie0: pcie@18012000 {

			compatible = "brcm,iproc-pcie";

			reg = <0x12000 0x1000>;



			#interrupt-cells = <1>;

			interrupt-map-mask = <0 0 0 0>;

			interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_NONE>;



			linux,pci-domain = <0>;



			bus-range = <0x00 0xff>;



			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";



			/* Note: The HW does not support I/O resources.  So,

			 * only the memory resource range is being specified.

			 */

			ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>;



			status = "disabled";

		};



		pcie1: pcie@18013000 {

			compatible = "brcm,iproc-pcie";

			reg = <0x13000 0x1000>;



			#interrupt-cells = <1>;

			interrupt-map-mask = <0 0 0 0>;

			interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_NONE>;



			linux,pci-domain = <1>;



			bus-range = <0x00 0xff>;



			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";



			/* Note: The HW does not support I/O resources.  So,

			 * only the memory resource range is being specified.

			 */

			ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>;



			status = "disabled";

		};



		pcie2: pcie@18014000 {

			compatible = "brcm,iproc-pcie";

			reg = <0x14000 0x1000>;



			#interrupt-cells = <1>;

			interrupt-map-mask = <0 0 0 0>;

			interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_NONE>;



			linux,pci-domain = <2>;



			bus-range = <0x00 0xff>;



			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";



			/* Note: The HW does not support I/O resources.  So,

			 * only the memory resource range is being specified.

			 */

			ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>;



			status = "disabled";

		};

	};

	};

};
 
};

arch/arm/boot/dts/bcm958625k.dts

+12 −0
Original line number Original line Diff line number Diff line
@@ -55,3 +55,15 @@ 
&uart1 {

&uart1 {

	status = "okay";

	status = "okay";

};

};



&pcie0 {

	status = "okay";

};



&pcie1 {

	status = "okay";

};



&pcie2 {

	status = "okay";

};