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Commit 1d5cc192 authored by Dominik Brodowski's avatar Dominik Brodowski
Browse files

pcmcia: use pcmica_{read,write}_config_byte 



Use pcmcia_read_config_byte and pcmcia_write_config_byte instead
of pcmcia_access_configuration_register.

CC: netdev@vger.kernel.org
CC: linux-wireless@vger.kernel.org
CC: linux-serial@vger.kernel.org
CC: Michael Buesch <mb@bu3sch.de>
Signed-off-by: default avatarDominik Brodowski <linux@dominikbrodowski.net>
parent ac8b4228

drivers/net/pcmcia/axnet_cs.c

+1 −2
Original line number Diff line number Diff line
@@ -378,8 +378,7 @@ static int axnet_config(struct pcmcia_device *link) 
    /* Maybe PHY is in power down mode. (PPD_SET = 1) 

       Bit 2 of CCSR is active low. */ 

    if (i == 32) {

	conf_reg_t reg = { 0, CS_WRITE, CISREG_CCSR, 0x04 };

 	pcmcia_access_configuration_register(link, &reg);

	pcmcia_write_config_byte(link, CISREG_CCSR, 0x04);

	for (i = 0; i < 32; i++) {

	    j = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 1);

	    j2 = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 2);

drivers/net/pcmcia/nmclan_cs.c

+6 −15
Original line number Diff line number Diff line
@@ -757,29 +757,20 @@ static void nmclan_reset(struct net_device *dev) 


#if RESET_XILINX

  struct pcmcia_device *link = &lp->link;

  conf_reg_t reg;

  u_long OrigCorValue; 

  u8 OrigCorValue;



  /* Save original COR value */

  reg.Function = 0;

  reg.Action = CS_READ;

  reg.Offset = CISREG_COR;

  reg.Value = 0;

  pcmcia_access_configuration_register(link, &reg);

  OrigCorValue = reg.Value;

  pcmcia_read_config_byte(link, CISREG_COR, &OrigCorValue);



  /* Reset Xilinx */

  reg.Action = CS_WRITE;

  reg.Offset = CISREG_COR;

  dev_dbg(&link->dev, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",

  dev_dbg(&link->dev, "nmclan_reset: OrigCorValue=0x%x, resetting...\n",

	OrigCorValue);

  reg.Value = COR_SOFT_RESET;

  pcmcia_access_configuration_register(link, &reg);

  pcmcia_write_config_byte(link, CISREG_COR, COR_SOFT_RESET);

  /* Need to wait for 20 ms for PCMCIA to finish reset. */



  /* Restore original COR configuration index */

  reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);

  pcmcia_access_configuration_register(link, &reg);

  pcmcia_write_config_byte(link, CISREG_COR,

			  (COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK)));

  /* Xilinx is now completely reset along with the MACE chip. */

  lp->tx_free_frames=AM2150_MAX_TX_FRAMES;

drivers/net/pcmcia/xirc2ps_cs.c

+7 −9
Original line number Diff line number Diff line
@@ -869,7 +869,6 @@ xirc2ps_config(struct pcmcia_device * link) 
	goto config_error;



    if (local->dingo) {

	conf_reg_t reg;

	win_req_t req;

	memreq_t mem;
@@ -878,15 +877,14 @@ xirc2ps_config(struct pcmcia_device * link) 
	 * the base address of the ethernet port (BasePort1) is written

	 * to the BAR registers of the modem.

	 */

	reg.Action = CS_WRITE;

	reg.Offset = CISREG_IOBASE_0;

	reg.Value = link->io.BasePort2 & 0xff;

	if ((err = pcmcia_access_configuration_register(link, &reg)))

	err = pcmcia_write_config_byte(link, CISREG_IOBASE_0,

				link->io.BasePort2 & 0xff);

	if (err)

	    goto config_error;

	reg.Action = CS_WRITE;

	reg.Offset = CISREG_IOBASE_1;

	reg.Value = (link->io.BasePort2 >> 8) & 0xff;

	if ((err = pcmcia_access_configuration_register(link, &reg)))



	err = pcmcia_write_config_byte(link, CISREG_IOBASE_1,

				(link->io.BasePort2 >> 8) & 0xff);

	if (err)

	    goto config_error;



	/* There is no config entry for the Ethernet part which

drivers/net/wireless/hostap/hostap_cs.c

+25 −66
Original line number Diff line number Diff line
@@ -224,27 +224,18 @@ static int prism2_pccard_card_present(local_info_t *local) 
static void sandisk_set_iobase(local_info_t *local)

{

	int res;

	conf_reg_t reg;

	struct hostap_cs_priv *hw_priv = local->hw_priv;



	reg.Function = 0;

	reg.Action = CS_WRITE;

	reg.Offset = 0x10; /* 0x3f0 IO base 1 */

	reg.Value = hw_priv->link->io.BasePort1 & 0x00ff;

	res = pcmcia_access_configuration_register(hw_priv->link,

						   &reg);

	res = pcmcia_write_config_byte(hw_priv->link, 0x10,

				hw_priv->link->io.BasePort1 & 0x00ff);

	if (res != 0) {

		printk(KERN_DEBUG "Prism3 SanDisk - failed to set I/O base 0 -"

		       " res=%d\n", res);

	}

	udelay(10);



	reg.Function = 0;

	reg.Action = CS_WRITE;

	reg.Offset = 0x12; /* 0x3f2 IO base 2 */

	reg.Value = (hw_priv->link->io.BasePort1 & 0xff00) >> 8;

	res = pcmcia_access_configuration_register(hw_priv->link,

						   &reg);

	res = pcmcia_write_config_byte(hw_priv->link, 0x12,

				(hw_priv->link->io.BasePort1 >> 8) & 0x00ff);

	if (res != 0) {

		printk(KERN_DEBUG "Prism3 SanDisk - failed to set I/O base 1 -"

		       " res=%d\n", res);
@@ -270,7 +261,6 @@ static void sandisk_write_hcr(local_info_t *local, int hcr) 
static int sandisk_enable_wireless(struct net_device *dev)

{

	int res, ret = 0;

	conf_reg_t reg;

	struct hostap_interface *iface = netdev_priv(dev);

	local_info_t *local = iface->local;

	struct hostap_cs_priv *hw_priv = local->hw_priv;
@@ -297,12 +287,8 @@ static int sandisk_enable_wireless(struct net_device *dev) 
	       " - using vendor-specific initialization\n", dev->name);

	hw_priv->sandisk_connectplus = 1;



	reg.Function = 0;

	reg.Action = CS_WRITE;

	reg.Offset = CISREG_COR;

	reg.Value = COR_SOFT_RESET;

	res = pcmcia_access_configuration_register(hw_priv->link,

						   &reg);

	res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR,

				COR_SOFT_RESET);

	if (res != 0) {

		printk(KERN_DEBUG "%s: SanDisk - COR sreset failed (%d)\n",

		       dev->name, res);
@@ -310,16 +296,13 @@ static int sandisk_enable_wireless(struct net_device *dev) 
	}

	mdelay(5);



	reg.Function = 0;

	reg.Action = CS_WRITE;

	reg.Offset = CISREG_COR;

	/*

	 * Do not enable interrupts here to avoid some bogus events. Interrupts

	 * will be enabled during the first cor_sreset call.

	 */

	reg.Value = COR_LEVEL_REQ | 0x8 | COR_ADDR_DECODE | COR_FUNC_ENA;

	res = pcmcia_access_configuration_register(hw_priv->link,

						   &reg);

	res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR,

				(COR_LEVEL_REQ | 0x8 | COR_ADDR_DECODE |

					COR_FUNC_ENA));

	if (res != 0) {

		printk(KERN_DEBUG "%s: SanDisk - COR sreset failed (%d)\n",

		       dev->name, res);
@@ -342,30 +325,23 @@ static int sandisk_enable_wireless(struct net_device *dev) 
static void prism2_pccard_cor_sreset(local_info_t *local)

{

	int res;

	conf_reg_t reg;

	u8 val;

	struct hostap_cs_priv *hw_priv = local->hw_priv;



	if (!prism2_pccard_card_present(local))

	       return;



	reg.Function = 0;

	reg.Action = CS_READ;

	reg.Offset = CISREG_COR;

	reg.Value = 0;

	res = pcmcia_access_configuration_register(hw_priv->link,

						   &reg);

	res = pcmcia_read_config_byte(hw_priv->link, CISREG_COR, &val);

	if (res != 0) {

		printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 1 (%d)\n",

		       res);

		return;

	}

	printk(KERN_DEBUG "prism2_pccard_cor_sreset: original COR %02x\n",

	       reg.Value);

		val);



	reg.Action = CS_WRITE;

	reg.Value |= COR_SOFT_RESET;

	res = pcmcia_access_configuration_register(hw_priv->link,

						   &reg);

	val |= COR_SOFT_RESET;

	res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR, val);

	if (res != 0) {

		printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 2 (%d)\n",

		       res);
@@ -374,11 +350,10 @@ static void prism2_pccard_cor_sreset(local_info_t *local) 


	mdelay(hw_priv->sandisk_connectplus ? 5 : 2);



	reg.Value &= ~COR_SOFT_RESET;

	val &= ~COR_SOFT_RESET;

	if (hw_priv->sandisk_connectplus)

		reg.Value |= COR_IREQ_ENA;

	res = pcmcia_access_configuration_register(hw_priv->link,

						   &reg);

		val |= COR_IREQ_ENA;

	res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR, val);

	if (res != 0) {

		printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 3 (%d)\n",

		       res);
@@ -395,8 +370,7 @@ static void prism2_pccard_cor_sreset(local_info_t *local) 
static void prism2_pccard_genesis_reset(local_info_t *local, int hcr)

{

	int res;

	conf_reg_t reg;

	int old_cor;

	u8 old_cor;

	struct hostap_cs_priv *hw_priv = local->hw_priv;



	if (!prism2_pccard_card_present(local))
@@ -407,25 +381,17 @@ static void prism2_pccard_genesis_reset(local_info_t *local, int hcr) 
		return;

	}



	reg.Function = 0;

	reg.Action = CS_READ;

	reg.Offset = CISREG_COR;

	reg.Value = 0;

	res = pcmcia_access_configuration_register(hw_priv->link,

						   &reg);

	res = pcmcia_read_config_byte(hw_priv->link, CISREG_COR, &old_cor);

	if (res != 0) {

		printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 1 "

		       "(%d)\n", res);

		return;

	}

	printk(KERN_DEBUG "prism2_pccard_genesis_sreset: original COR %02x\n",

	       reg.Value);

	old_cor = reg.Value;

		old_cor);



	reg.Action = CS_WRITE;

	reg.Value |= COR_SOFT_RESET;

	res = pcmcia_access_configuration_register(hw_priv->link,

						   &reg);

	res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR,

				old_cor | COR_SOFT_RESET);

	if (res != 0) {

		printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 2 "

		       "(%d)\n", res);
@@ -435,11 +401,7 @@ static void prism2_pccard_genesis_reset(local_info_t *local, int hcr) 
	mdelay(10);



	/* Setup Genesis mode */

	reg.Action = CS_WRITE;

	reg.Value = hcr;

	reg.Offset = CISREG_CCSR;

	res = pcmcia_access_configuration_register(hw_priv->link,

						   &reg);

	res = pcmcia_write_config_byte(hw_priv->link, CISREG_CCSR, hcr);

	if (res != 0) {

		printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 3 "

		       "(%d)\n", res);
@@ -447,11 +409,8 @@ static void prism2_pccard_genesis_reset(local_info_t *local, int hcr) 
	}

	mdelay(10);



	reg.Action = CS_WRITE;

	reg.Offset = CISREG_COR;

	reg.Value = old_cor & ~COR_SOFT_RESET;

	res = pcmcia_access_configuration_register(hw_priv->link,

						   &reg);

	res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR,

				old_cor & ~COR_SOFT_RESET);

	if (res != 0) {

		printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 4 "

		       "(%d)\n", res);

drivers/net/wireless/orinoco/spectrum_cs.c

+10 −22
Original line number Diff line number Diff line
@@ -79,35 +79,27 @@ static int 
spectrum_reset(struct pcmcia_device *link, int idle)

{

	int ret;

	conf_reg_t reg;

	u_int save_cor;

	u8 save_cor;

	u8 ccsr;



	/* Doing it if hardware is gone is guaranteed crash */

	if (!pcmcia_dev_present(link))

		return -ENODEV;



	/* Save original COR value */

	reg.Function = 0;

	reg.Action = CS_READ;

	reg.Offset = CISREG_COR;

	ret = pcmcia_access_configuration_register(link, &reg);

	ret = pcmcia_read_config_byte(link, CISREG_COR, &save_cor);

	if (ret)

		goto failed;

	save_cor = reg.Value;



	/* Soft-Reset card */

	reg.Action = CS_WRITE;

	reg.Offset = CISREG_COR;

	reg.Value = (save_cor | COR_SOFT_RESET);

	ret = pcmcia_access_configuration_register(link, &reg);

	ret = pcmcia_write_config_byte(link, CISREG_COR,

				(save_cor | COR_SOFT_RESET));

	if (ret)

		goto failed;

	udelay(1000);



	/* Read CCSR */

	reg.Action = CS_READ;

	reg.Offset = CISREG_CCSR;

	ret = pcmcia_access_configuration_register(link, &reg);

	ret = pcmcia_read_config_byte(link, CISREG_CCSR, &ccsr);

	if (ret)

		goto failed;
@@ -115,19 +107,15 @@ spectrum_reset(struct pcmcia_device *link, int idle) 
	 * Start or stop the firmware.  Memory width bit should be

	 * preserved from the value we've just read.

	 */

	reg.Action = CS_WRITE;

	reg.Offset = CISREG_CCSR;

	reg.Value = (idle ? HCR_IDLE : HCR_RUN) | (reg.Value & HCR_MEM16);

	ret = pcmcia_access_configuration_register(link, &reg);

	ccsr = (idle ? HCR_IDLE : HCR_RUN) | (ccsr & HCR_MEM16);

	ret = pcmcia_write_config_byte(link, CISREG_CCSR, ccsr);

	if (ret)

		goto failed;

	udelay(1000);



	/* Restore original COR configuration index */

	reg.Action = CS_WRITE;

	reg.Offset = CISREG_COR;

	reg.Value = (save_cor & ~COR_SOFT_RESET);

	ret = pcmcia_access_configuration_register(link, &reg);

	ret = pcmcia_write_config_byte(link, CISREG_COR,

				(save_cor & ~COR_SOFT_RESET));

	if (ret)

		goto failed;

	udelay(1000);