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Commit 1bb5fcb1 authored by Tero Kristo's avatar Tero Kristo Committed by Tony Lindgren
Browse files

ARM: dts: omap2: fix clock node definitions to avoid build warnings 



Upcoming change to DT compiler is going to complain about nodes
which have a reg property, but have not defined the address in their
name. This patch fixes following type of warnings for OMAP2 clock nodes:

Warning (unit_address_vs_reg): Node /ocp/cm@48004000/clocks/dpll3_m2_ck
has a reg or ranges property, but no unit name

Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent b5b5340d

arch/arm/boot/dts/omap2420-clocks.dtsi

+19 −19
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@ 
 */



&prcm_clocks {

	sys_clkout2_src_gate: sys_clkout2_src_gate {

	sys_clkout2_src_gate: sys_clkout2_src_gate@70 {

		#clock-cells = <0>;

		compatible = "ti,composite-no-wait-gate-clock";

		clocks = <&core_ck>;
@@ -17,7 +17,7 @@ 
		reg = <0x0070>;

	};



	sys_clkout2_src_mux: sys_clkout2_src_mux {

	sys_clkout2_src_mux: sys_clkout2_src_mux@70 {

		#clock-cells = <0>;

		compatible = "ti,composite-mux-clock";

		clocks = <&core_ck>, <&sys_ck>, <&func_96m_ck>, <&func_54m_ck>;
@@ -31,7 +31,7 @@ 
		clocks = <&sys_clkout2_src_gate>, <&sys_clkout2_src_mux>;

	};



	sys_clkout2: sys_clkout2 {

	sys_clkout2: sys_clkout2@70 {

		#clock-cells = <0>;

		compatible = "ti,divider-clock";

		clocks = <&sys_clkout2_src>;
@@ -41,7 +41,7 @@ 
		ti,index-power-of-two;

	};



	dsp_gate_ick: dsp_gate_ick {

	dsp_gate_ick: dsp_gate_ick@810 {

		#clock-cells = <0>;

		compatible = "ti,composite-interface-clock";

		clocks = <&dsp_fck>;
@@ -49,7 +49,7 @@ 
		reg = <0x0810>;

	};



	dsp_div_ick: dsp_div_ick {

	dsp_div_ick: dsp_div_ick@840 {

		#clock-cells = <0>;

		compatible = "ti,composite-divider-clock";

		clocks = <&dsp_fck>;
@@ -65,7 +65,7 @@ 
		clocks = <&dsp_gate_ick>, <&dsp_div_ick>;

	};



	iva1_gate_ifck: iva1_gate_ifck {

	iva1_gate_ifck: iva1_gate_ifck@800 {

		#clock-cells = <0>;

		compatible = "ti,composite-gate-clock";

		clocks = <&core_ck>;
@@ -73,7 +73,7 @@ 
		reg = <0x0800>;

	};



	iva1_div_ifck: iva1_div_ifck {

	iva1_div_ifck: iva1_div_ifck@840 {

		#clock-cells = <0>;

		compatible = "ti,composite-divider-clock";

		clocks = <&core_ck>;
@@ -96,7 +96,7 @@ 
		clock-div = <2>;

	};



	iva1_mpu_int_ifck: iva1_mpu_int_ifck {

	iva1_mpu_int_ifck: iva1_mpu_int_ifck@800 {

		#clock-cells = <0>;

		compatible = "ti,wait-gate-clock";

		clocks = <&iva1_ifck_div>;
@@ -104,7 +104,7 @@ 
		reg = <0x0800>;

	};



	wdt3_ick: wdt3_ick {

	wdt3_ick: wdt3_ick@210 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&l4_ck>;
@@ -112,7 +112,7 @@ 
		reg = <0x0210>;

	};



	wdt3_fck: wdt3_fck {

	wdt3_fck: wdt3_fck@200 {

		#clock-cells = <0>;

		compatible = "ti,wait-gate-clock";

		clocks = <&func_32k_ck>;
@@ -120,7 +120,7 @@ 
		reg = <0x0200>;

	};



	mmc_ick: mmc_ick {

	mmc_ick: mmc_ick@210 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&l4_ck>;
@@ -128,7 +128,7 @@ 
		reg = <0x0210>;

	};



	mmc_fck: mmc_fck {

	mmc_fck: mmc_fck@200 {

		#clock-cells = <0>;

		compatible = "ti,wait-gate-clock";

		clocks = <&func_96m_ck>;
@@ -136,7 +136,7 @@ 
		reg = <0x0200>;

	};



	eac_ick: eac_ick {

	eac_ick: eac_ick@210 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&l4_ck>;
@@ -144,7 +144,7 @@ 
		reg = <0x0210>;

	};



	eac_fck: eac_fck {

	eac_fck: eac_fck@200 {

		#clock-cells = <0>;

		compatible = "ti,wait-gate-clock";

		clocks = <&func_96m_ck>;
@@ -152,7 +152,7 @@ 
		reg = <0x0200>;

	};



	i2c1_fck: i2c1_fck {

	i2c1_fck: i2c1_fck@200 {

		#clock-cells = <0>;

		compatible = "ti,wait-gate-clock";

		clocks = <&func_12m_ck>;
@@ -160,7 +160,7 @@ 
		reg = <0x0200>;

	};



	i2c2_fck: i2c2_fck {

	i2c2_fck: i2c2_fck@200 {

		#clock-cells = <0>;

		compatible = "ti,wait-gate-clock";

		clocks = <&func_12m_ck>;
@@ -168,7 +168,7 @@ 
		reg = <0x0200>;

	};



	vlynq_ick: vlynq_ick {

	vlynq_ick: vlynq_ick@210 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&core_l3_ck>;
@@ -176,7 +176,7 @@ 
		reg = <0x0210>;

	};



	vlynq_gate_fck: vlynq_gate_fck {

	vlynq_gate_fck: vlynq_gate_fck@200 {

		#clock-cells = <0>;

		compatible = "ti,composite-gate-clock";

		clocks = <&core_ck>;
@@ -192,7 +192,7 @@ 
		clock-div = <18>;

	};



	vlynq_mux_fck: vlynq_mux_fck {

	vlynq_mux_fck: vlynq_mux_fck@240 {

		#clock-cells = <0>;

		compatible = "ti,composite-mux-clock";

		clocks = <&func_96m_ck>, <&core_ck>, <&core_d2_ck>, <&core_d3_ck>, <&core_d4_ck>, <&dummy_ck>, <&core_d6_ck>, <&dummy_ck>, <&core_d8_ck>, <&core_d9_ck>, <&dummy_ck>, <&dummy_ck>, <&core_d12_ck>, <&dummy_ck>, <&dummy_ck>, <&dummy_ck>, <&core_d16_ck>, <&dummy_ck>, <&core_d18_ck>;

arch/arm/boot/dts/omap2430-clocks.dtsi

+29 −29
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@ 
 */



&scm_clocks {

	mcbsp3_mux_fck: mcbsp3_mux_fck {

	mcbsp3_mux_fck: mcbsp3_mux_fck@78 {

		#clock-cells = <0>;

		compatible = "ti,composite-mux-clock";

		clocks = <&func_96m_ck>, <&mcbsp_clks>;
@@ -22,7 +22,7 @@ 
		clocks = <&mcbsp3_gate_fck>, <&mcbsp3_mux_fck>;

	};



	mcbsp4_mux_fck: mcbsp4_mux_fck {

	mcbsp4_mux_fck: mcbsp4_mux_fck@78 {

		#clock-cells = <0>;

		compatible = "ti,composite-mux-clock";

		clocks = <&func_96m_ck>, <&mcbsp_clks>;
@@ -36,7 +36,7 @@ 
		clocks = <&mcbsp4_gate_fck>, <&mcbsp4_mux_fck>;

	};



	mcbsp5_mux_fck: mcbsp5_mux_fck {

	mcbsp5_mux_fck: mcbsp5_mux_fck@78 {

		#clock-cells = <0>;

		compatible = "ti,composite-mux-clock";

		clocks = <&func_96m_ck>, <&mcbsp_clks>;
@@ -52,7 +52,7 @@ 
};



&prcm_clocks {

	iva2_1_gate_ick: iva2_1_gate_ick {

	iva2_1_gate_ick: iva2_1_gate_ick@800 {

		#clock-cells = <0>;

		compatible = "ti,composite-gate-clock";

		clocks = <&dsp_fck>;
@@ -60,7 +60,7 @@ 
		reg = <0x0800>;

	};



	iva2_1_div_ick: iva2_1_div_ick {

	iva2_1_div_ick: iva2_1_div_ick@840 {

		#clock-cells = <0>;

		compatible = "ti,composite-divider-clock";

		clocks = <&dsp_fck>;
@@ -76,7 +76,7 @@ 
		clocks = <&iva2_1_gate_ick>, <&iva2_1_div_ick>;

	};



	mdm_gate_ick: mdm_gate_ick {

	mdm_gate_ick: mdm_gate_ick@c10 {

		#clock-cells = <0>;

		compatible = "ti,composite-interface-clock";

		clocks = <&core_ck>;
@@ -84,7 +84,7 @@ 
		reg = <0x0c10>;

	};



	mdm_div_ick: mdm_div_ick {

	mdm_div_ick: mdm_div_ick@c40 {

		#clock-cells = <0>;

		compatible = "ti,composite-divider-clock";

		clocks = <&core_ck>;
@@ -98,7 +98,7 @@ 
		clocks = <&mdm_gate_ick>, <&mdm_div_ick>;

	};



	mdm_osc_ck: mdm_osc_ck {

	mdm_osc_ck: mdm_osc_ck@c00 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&osc_ck>;
@@ -106,7 +106,7 @@ 
		reg = <0x0c00>;

	};



	mcbsp3_ick: mcbsp3_ick {

	mcbsp3_ick: mcbsp3_ick@214 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&l4_ck>;
@@ -114,7 +114,7 @@ 
		reg = <0x0214>;

	};



	mcbsp3_gate_fck: mcbsp3_gate_fck {

	mcbsp3_gate_fck: mcbsp3_gate_fck@204 {

		#clock-cells = <0>;

		compatible = "ti,composite-gate-clock";

		clocks = <&mcbsp_clks>;
@@ -122,7 +122,7 @@ 
		reg = <0x0204>;

	};



	mcbsp4_ick: mcbsp4_ick {

	mcbsp4_ick: mcbsp4_ick@214 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&l4_ck>;
@@ -130,7 +130,7 @@ 
		reg = <0x0214>;

	};



	mcbsp4_gate_fck: mcbsp4_gate_fck {

	mcbsp4_gate_fck: mcbsp4_gate_fck@204 {

		#clock-cells = <0>;

		compatible = "ti,composite-gate-clock";

		clocks = <&mcbsp_clks>;
@@ -138,7 +138,7 @@ 
		reg = <0x0204>;

	};



	mcbsp5_ick: mcbsp5_ick {

	mcbsp5_ick: mcbsp5_ick@214 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&l4_ck>;
@@ -146,7 +146,7 @@ 
		reg = <0x0214>;

	};



	mcbsp5_gate_fck: mcbsp5_gate_fck {

	mcbsp5_gate_fck: mcbsp5_gate_fck@204 {

		#clock-cells = <0>;

		compatible = "ti,composite-gate-clock";

		clocks = <&mcbsp_clks>;
@@ -154,7 +154,7 @@ 
		reg = <0x0204>;

	};



	mcspi3_ick: mcspi3_ick {

	mcspi3_ick: mcspi3_ick@214 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&l4_ck>;
@@ -162,7 +162,7 @@ 
		reg = <0x0214>;

	};



	mcspi3_fck: mcspi3_fck {

	mcspi3_fck: mcspi3_fck@204 {

		#clock-cells = <0>;

		compatible = "ti,wait-gate-clock";

		clocks = <&func_48m_ck>;
@@ -170,7 +170,7 @@ 
		reg = <0x0204>;

	};



	icr_ick: icr_ick {

	icr_ick: icr_ick@410 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&sys_ck>;
@@ -178,7 +178,7 @@ 
		reg = <0x0410>;

	};



	i2chs1_fck: i2chs1_fck {

	i2chs1_fck: i2chs1_fck@204 {

		#clock-cells = <0>;

		compatible = "ti,omap2430-interface-clock";

		clocks = <&func_96m_ck>;
@@ -186,7 +186,7 @@ 
		reg = <0x0204>;

	};



	i2chs2_fck: i2chs2_fck {

	i2chs2_fck: i2chs2_fck@204 {

		#clock-cells = <0>;

		compatible = "ti,omap2430-interface-clock";

		clocks = <&func_96m_ck>;
@@ -194,7 +194,7 @@ 
		reg = <0x0204>;

	};



	usbhs_ick: usbhs_ick {

	usbhs_ick: usbhs_ick@214 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&core_l3_ck>;
@@ -202,7 +202,7 @@ 
		reg = <0x0214>;

	};



	mmchs1_ick: mmchs1_ick {

	mmchs1_ick: mmchs1_ick@214 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&l4_ck>;
@@ -210,7 +210,7 @@ 
		reg = <0x0214>;

	};



	mmchs1_fck: mmchs1_fck {

	mmchs1_fck: mmchs1_fck@204 {

		#clock-cells = <0>;

		compatible = "ti,wait-gate-clock";

		clocks = <&func_96m_ck>;
@@ -218,7 +218,7 @@ 
		reg = <0x0204>;

	};



	mmchs2_ick: mmchs2_ick {

	mmchs2_ick: mmchs2_ick@214 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&l4_ck>;
@@ -226,7 +226,7 @@ 
		reg = <0x0214>;

	};



	mmchs2_fck: mmchs2_fck {

	mmchs2_fck: mmchs2_fck@204 {

		#clock-cells = <0>;

		compatible = "ti,wait-gate-clock";

		clocks = <&func_96m_ck>;
@@ -234,7 +234,7 @@ 
		reg = <0x0204>;

	};



	gpio5_ick: gpio5_ick {

	gpio5_ick: gpio5_ick@214 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&l4_ck>;
@@ -242,7 +242,7 @@ 
		reg = <0x0214>;

	};



	gpio5_fck: gpio5_fck {

	gpio5_fck: gpio5_fck@204 {

		#clock-cells = <0>;

		compatible = "ti,wait-gate-clock";

		clocks = <&func_32k_ck>;
@@ -250,7 +250,7 @@ 
		reg = <0x0204>;

	};



	mdm_intc_ick: mdm_intc_ick {

	mdm_intc_ick: mdm_intc_ick@214 {

		#clock-cells = <0>;

		compatible = "ti,omap3-interface-clock";

		clocks = <&l4_ck>;
@@ -258,7 +258,7 @@ 
		reg = <0x0214>;

	};



	mmchsdb1_fck: mmchsdb1_fck {

	mmchsdb1_fck: mmchsdb1_fck@204 {

		#clock-cells = <0>;

		compatible = "ti,wait-gate-clock";

		clocks = <&func_32k_ck>;
@@ -266,7 +266,7 @@ 
		reg = <0x0204>;

	};



	mmchsdb2_fck: mmchsdb2_fck {

	mmchsdb2_fck: mmchsdb2_fck@204 {

		#clock-cells = <0>;

		compatible = "ti,wait-gate-clock";

		clocks = <&func_32k_ck>;

arch/arm/boot/dts/omap24xx-clocks.dtsi

+114 −114

File changed.

Preview size limit exceeded, changes collapsed.