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Commit 1b3b3841 authored by Hans Verkuil's avatar Hans Verkuil Committed by Mauro Carvalho Chehab
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[media] v4l2-dv-timings: log if the timing is reduced blanking V2 



The last CVT standard introduced reduced blanking version 2 which is signaled by
a vsync of 8. Log this.

Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@osg.samsung.com>
parent 5fea1bb7

drivers/media/v4l2-core/v4l2-dv-timings.c

+3 −1
Original line number Diff line number Diff line
@@ -290,9 +290,11 @@ void v4l2_print_dv_timings(const char *dev_prefix, const char *prefix, 
			(bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",

			bt->il_vsync, bt->il_vbackporch);

	pr_info("%s: pixelclock: %llu\n", dev_prefix, bt->pixelclock);

	pr_info("%s: flags (0x%x):%s%s%s%s%s\n", dev_prefix, bt->flags,

	pr_info("%s: flags (0x%x):%s%s%s%s%s%s\n", dev_prefix, bt->flags,

			(bt->flags & V4L2_DV_FL_REDUCED_BLANKING) ?

			" REDUCED_BLANKING" : "",

			((bt->flags & V4L2_DV_FL_REDUCED_BLANKING) &&

			 bt->vsync == 8) ? " (V2)" : "",

			(bt->flags & V4L2_DV_FL_CAN_REDUCE_FPS) ?

			" CAN_REDUCE_FPS" : "",

			(bt->flags & V4L2_DV_FL_REDUCED_FPS) ?