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Commit 1ab23380 authored Aug 22, 2014 by Satheeshakrishna M Committed by Daniel Vetter Apr 16, 2015

drm/i915/bxt: Restrict PORT_CLK_SEL programming below gen9



PORT_CLK_SEL programming is needed only on HSW/BDW.

v2:
- don't program PORT_CLK_SEL from mst encoders either (imre)
v3:
- fix the check for GEN9+ in intel_mst_pre_enable_dp() (damien)

Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Sagar Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

parent 535afa2e

drivers/gpu/drm/i915/intel_ddi.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -1567,7 +1567,7 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder)

		I915_WRITE(DPLL_CTRL2, val);

		} else {
		} else if (INTEL_INFO(dev)->gen < 9) {
		WARN_ON(crtc->config->ddi_pll_sel == PORT_CLK_SEL_NONE);
		I915_WRITE(PORT_CLK_SEL(port), crtc->config->ddi_pll_sel);
		}
		@@ -1626,7 +1626,7 @@ static void intel_ddi_post_disable(struct intel_encoder *intel_encoder)
		if (IS_SKYLAKE(dev))
		I915_WRITE(DPLL_CTRL2, (I915_READ(DPLL_CTRL2) \|
		DPLL_CTRL2_DDI_CLK_OFF(port)));
		else
		else if (INTEL_INFO(dev)->gen < 9)
		I915_WRITE(PORT_CLK_SEL(port), PORT_CLK_SEL_NONE);
		}

drivers/gpu/drm/i915/intel_dp_mst.c

+4 −2

Original line number	Diff line number	Diff line
		@@ -173,6 +173,8 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
		if (intel_dp->active_mst_links == 0) {
		enum port port = intel_ddi_get_encoder_port(encoder);

		/* FIXME: add support for SKL */
		if (INTEL_INFO(dev)->gen < 9)
		I915_WRITE(PORT_CLK_SEL(port),
		intel_crtc->config->ddi_pll_sel);