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Commit 1a9f6c88 authored by Jonghwa Lee's avatar Jonghwa Lee Committed by Sylwester Nawrocki
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clk: exynos5433: Fix CLK_PCLK_MONOTONIC_CNT clk register assignment 



CLK_PCLK_MONOTONIC_CNT clock had a wrong register assigned to it.
The correct register is ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT.

Signed-off-by: default avatarJonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: default avatarKrzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
parent a84d1f54

drivers/clk/samsung/clk-exynos5433.c

+1 −1
Original line number Diff line number Diff line
@@ -1490,7 +1490,7 @@ static struct samsung_gate_clock mif_gate_clks[] __initdata = { 


	/* ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT */

	GATE(CLK_PCLK_MONOTONIC_CNT, "pclk_monotonic_cnt", "div_aclk_mif_133",

			ENABLE_PCLK_MIF_SECURE_RTC, 0, 0, 0),

			ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT, 0, 0, 0),



	/* ENABLE_PCLK_MIF_SECURE_RTC */

	GATE(CLK_PCLK_RTC, "pclk_rtc", "div_aclk_mif_133",