Commit 176f950d authored Nov 04, 2011 by Emil Tantilov Committed by Jeff Kirsher Jan 02, 2012

ixgbe: add write flush in ixgbe_clock_out_i2c_byte()



I2C access is timing critical. Always do a write flush after writing
to the I2CCTL register.

Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

parent 52f33af8

drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -1457,6 +1457,7 @@ static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data)
		i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL);
		i2cctl \|= IXGBE_I2C_DATA_OUT;
		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, i2cctl);
		IXGBE_WRITE_FLUSH(hw);

		return status;
		}