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Commit 174178fe authored by Eric Auger's avatar Eric Auger Committed by Christoffer Dall
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KVM: arm/arm64: add irqfd support 



This patch enables irqfd on arm/arm64.

Both irqfd and resamplefd are supported. Injection is implemented
in vgic.c without routing.

This patch enables CONFIG_HAVE_KVM_EVENTFD and CONFIG_HAVE_KVM_IRQFD.

KVM_CAP_IRQFD is now advertised. KVM_CAP_IRQFD_RESAMPLE capability
automatically is advertised as soon as CONFIG_HAVE_KVM_IRQFD is set.

Irqfd injection is restricted to SPI. The rationale behind not
supporting PPI irqfd injection is that any device using a PPI would
be a private-to-the-CPU device (timer for instance), so its state
would have to be context-switched along with the VCPU and would
require in-kernel wiring anyhow. It is not a relevant use case for
irqfds.

Signed-off-by: default avatarEric Auger <eric.auger@linaro.org>
Reviewed-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
parent 649cf739

Documentation/virtual/kvm/api.txt

+5 −1
Original line number Diff line number Diff line
@@ -2234,7 +2234,7 @@ into the hash PTE second double word). 
4.75 KVM_IRQFD



Capability: KVM_CAP_IRQFD

Architectures: x86 s390

Architectures: x86 s390 arm arm64

Type: vm ioctl

Parameters: struct kvm_irqfd (in)

Returns: 0 on success, -1 on error
@@ -2260,6 +2260,10 @@ Note that closing the resamplefd is not sufficient to disable the 
irqfd.  The KVM_IRQFD_FLAG_RESAMPLE is only necessary on assignment

and need not be specified with KVM_IRQFD_FLAG_DEASSIGN.



On ARM/ARM64, the gsi field in the kvm_irqfd struct specifies the Shared

Peripheral Interrupt (SPI) index, such that the GIC interrupt ID is

given by gsi + 32.



4.76 KVM_PPC_ALLOCATE_HTAB



Capability: KVM_CAP_PPC_ALLOC_HTAB

arch/arm/include/uapi/asm/kvm.h

+3 −0
Original line number Diff line number Diff line
@@ -198,6 +198,9 @@ struct kvm_arch_memory_slot { 
/* Highest supported SPI, from VGIC_NR_IRQS */

#define KVM_ARM_IRQ_GIC_MAX		127



/* One single KVM irqchip, ie. the VGIC */

#define KVM_NR_IRQCHIPS          1



/* PSCI interface */

#define KVM_PSCI_FN_BASE		0x95c1ba5e

#define KVM_PSCI_FN(n)			(KVM_PSCI_FN_BASE + (n))

arch/arm/kvm/Kconfig

+2 −0
Original line number Diff line number Diff line
@@ -28,6 +28,8 @@ config KVM 
	select KVM_GENERIC_DIRTYLOG_READ_PROTECT

	select SRCU

	select MMU_NOTIFIER

	select HAVE_KVM_EVENTFD

	select HAVE_KVM_IRQFD

	depends on ARM_VIRT_EXT && ARM_LPAE && ARM_ARCH_TIMER

	---help---

	  Support hosting virtualized guest machines.

arch/arm/kvm/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ AFLAGS_init.o := -Wa,-march=armv7-a$(plus_virt) 
AFLAGS_interrupts.o := -Wa,-march=armv7-a$(plus_virt)



KVM := ../../../virt/kvm

kvm-arm-y = $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o

kvm-arm-y = $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/eventfd.o



obj-y += kvm-arm.o init.o interrupts.o

obj-y += arm.o handle_exit.o guest.o mmu.o emulate.o reset.o

arch/arm/kvm/arm.c

+1 −0
Original line number Diff line number Diff line
@@ -171,6 +171,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) 
	int r;

	switch (ext) {

	case KVM_CAP_IRQCHIP:

	case KVM_CAP_IRQFD:

	case KVM_CAP_DEVICE_CTRL:

	case KVM_CAP_USER_MEMORY:

	case KVM_CAP_SYNC_MMU: