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Commit 16529509 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'dt-part2-v2-for-v3.18' of... 

Merge tag 'dt-part2-v2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

 into next/dt

Pull "part 2 of omap dts changes" from Tony Lindgren:

Changes to add dra7 PMU, display support for cm-t54, misc
changes needed for omap3 boards for device tree support.

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>

* tag 'dt-part2-v2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: DRA7: Add PMU nodes
  ARM: dts: cm-t54: setup omap_dwc3
  ARM: dts: cm-t54: add ADS7846 touchscreen support
  ARM: dts: cm-t54: add Startek LCD support
  ARM: dts: cm-t54: add HDMI/DVI display data
  ARM: dts: cm-t54: fix mux mode comment style
  ARM: dts: sbc-t54: fix mux mode comment style
  ARM: dts: Enable PMIC idle configuration for LDP
  ARM: dts: Add support for Ethernet on some N900 macro boards
  ARM: dts: Do not set pulls for I2C lines
  ARM: dts: omap: Remove WAKEUPENABLE mux options for UARTs
  ARM: dts: omap3-overo: Fix UART wake-up events
parents 478a4f81 f53e3c53

arch/arm/boot/dts/dra72x.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -22,4 +22,9 @@ 
			reg = <0>;

		};

	};



	pmu {

		compatible = "arm,cortex-a15-pmu";

		interrupts = <GIC_SPI DIRECT_IRQ(131) IRQ_TYPE_LEVEL_HIGH>;

	};

};

arch/arm/boot/dts/dra74x.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -38,4 +38,10 @@ 
			reg = <1>;

		};

	};



	pmu {

		compatible = "arm,cortex-a15-pmu";

		interrupts = <GIC_SPI DIRECT_IRQ(131) IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI DIRECT_IRQ(132) IRQ_TYPE_LEVEL_HIGH>;

	};

};

arch/arm/boot/dts/omap3-beagle-xm.dts

+2 −2
Original line number Diff line number Diff line
@@ -174,7 +174,7 @@ 


	uart3_pins: pinmux_uart3_pins {

		pinctrl-single,pins = <

			0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */

			0x16e (PIN_INPUT | MUX_MODE0)	/* uart3_rx_irrx.uart3_rx_irrx */

			0x170 (PIN_OUTPUT | MUX_MODE0)	/* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */

		>;

	};

arch/arm/boot/dts/omap3-ldp.dts

+5 −0
Original line number Diff line number Diff line
@@ -159,6 +159,11 @@ 
		reg = <0x48>;

		interrupts = <7>; /* SYS_NIRQ cascaded to intc */

		interrupt-parent = <&intc>;



		twl_power: power {

			compatible = "ti,twl4030-power-idle";

			ti,use_poweroff;

		};

	};

};

arch/arm/boot/dts/omap3-n900.dts

+48 −6
Original line number Diff line number Diff line
@@ -134,24 +134,32 @@ 
		>;

	};



	ethernet_pins: pinmux_ethernet_pins {

		pinctrl-single,pins = <

			OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* gpmc_ncs3.gpio_54 */

			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4)		/* dss_data16.gpio_86 */

			OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)		/* uart3_rts_sd.gpio_164 */

		>;

	};



	i2c1_pins: pinmux_i2c1_pins {

		pinctrl-single,pins = <

			0x18a (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_scl */

			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_sda */

			0x18a (PIN_INPUT | MUX_MODE0)		/* i2c1_scl */

			0x18c (PIN_INPUT | MUX_MODE0)		/* i2c1_sda */

		>;

	};



	i2c2_pins: pinmux_i2c2_pins {

		pinctrl-single,pins = <

			0x18e (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c2_scl */

			0x190 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c2_sda */

			0x18e (PIN_INPUT | MUX_MODE0)		/* i2c2_scl */

			0x190 (PIN_INPUT | MUX_MODE0)		/* i2c2_sda */

		>;

	};



	i2c3_pins: pinmux_i2c3_pins {

		pinctrl-single,pins = <

			0x192 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_scl */

			0x194 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_sda */

			0x192 (PIN_INPUT | MUX_MODE0)		/* i2c3_scl */

			0x194 (PIN_INPUT | MUX_MODE0)		/* i2c3_sda */

		>;

	};
@@ -578,6 +586,8 @@ 


&gpmc {

	ranges = <0 0 0x04000000 0x10000000>; /* 256MB */

	ranges = <0 0 0x01000000 0x01000000>,	/* 16 MB for OneNAND */

		 <1 0 0x02000000 0x01000000>;	/* 16 MB for smc91c96 */



	/* gpio-irq for dma: 65 */
@@ -646,6 +656,38 @@ 
			reg = <0x004c0000 0x0fb40000>;

		};

	};



	ethernet@gpmc {

		compatible = "smsc,lan91c94";

		interrupt-parent = <&gpio2>;

		interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;	/* gpio54 */

		reg = <1 0x300 0xf>;		/* 16 byte IO range at offset 0x300 */

		bank-width = <2>;

		pinctrl-names = "default";

		pinctrl-0 = <&ethernet_pins>;

		gpmc,device-width = <2>;

		gpmc,sync-clk-ps = <0>;

		gpmc,cs-on-ns = <0>;

		gpmc,cs-rd-off-ns = <48>;

		gpmc,cs-wr-off-ns = <24>;

		gpmc,adv-on-ns = <0>;

		gpmc,adv-rd-off-ns = <0>;

		gpmc,adv-wr-off-ns = <0>;

		gpmc,we-on-ns = <12>;

		gpmc,we-off-ns = <18>;

		gpmc,oe-on-ns = <12>;

		gpmc,oe-off-ns = <48>;

		gpmc,page-burst-access-ns = <0>;

		gpmc,access-ns = <42>;

		gpmc,rd-cycle-ns = <180>;

		gpmc,wr-cycle-ns = <180>;

		gpmc,bus-turnaround-ns = <0>;

		gpmc,cycle2cycle-delay-ns = <0>;

		gpmc,wait-monitoring-ns = <0>;

		gpmc,clk-activation-ns = <0>;

		gpmc,wr-access-ns = <0>;

		gpmc,wr-data-mux-bus-ns = <12>;

	};

};



&mcspi1 {